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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-11-28 18:15:51 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-11-28 18:15:51 +0000
commit75ad73760f33b0d2b30061919d8d4b4bf0b4277b (patch)
treefa1952b4f64567b4a808aa2c9dbb7d672f517c38 /c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
parent2001-11-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff)
downloadrtems-75ad73760f33b0d2b30061919d8d4b4bf0b4277b.tar.bz2
2001-11-28 Joel Sherrill <joel@OARcorp.com>,
This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation. * rtems/score/c_isr.inl: Deleted and contents merged into cpu.c. * cpu.c: Received contents of c_isr.inl. * Makefile.am: Deleted reference to c_isr.inl.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c')
-rw-r--r--c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
index 38a962e967..10d38fab1a 100644
--- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
+++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
@@ -110,6 +110,19 @@ void _CPU_Install_interrupt_stack( void )
{
}
+/*PAGE
+ *
+ * This is the PowerPC specific implementation of the routine which
+ * returns TRUE if an interrupt is in progress.
+ */
-
+boolean _ISR_Is_in_progress( void )
+{
+ register unsigned int isr_nesting_level;
+ /*
+ * Move from special purpose register 0 (mfspr SPRG0, r3)
+ */
+ asm volatile ("mfspr %0, 272" : "=r" (isr_nesting_level));
+ return isr_nesting_level;
+}