diff options
author | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2008-07-11 10:01:37 +0000 |
---|---|---|
committer | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2008-07-11 10:01:37 +0000 |
commit | a86f3aac965e39414f19d7e67ed50400583cd598 (patch) | |
tree | 24692c56d9b7480af4482d4ac5930d099c3396b1 /c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c | |
parent | added variant to gen68360 BSP (diff) | |
download | rtems-a86f3aac965e39414f19d7e67ed50400583cd598.tar.bz2 |
adapted powerpc BSPs to new exception code
Diffstat (limited to 'c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c index 86cf311cb6..0949bccca2 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c @@ -23,6 +23,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include <string.h> #include <rtems/libio.h> @@ -36,7 +38,6 @@ #include <bsp/irq.h> #include <bsp.h> -SPR_RW(SPRG0) SPR_RW(SPRG1) extern unsigned long intrStackPtr; @@ -143,8 +144,6 @@ void bsp_start(void) */ intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); /* * Install our own set of exception vectors |