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| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2008-08-20 05:47:08 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2008-08-20 05:47:08 +0000 |
| commit | cc981e11bcab3aebca6c35197273ccb214ebfc5f (patch) | |
| tree | 9a688b7581b7f30de5413c14fb2a33656d4404b6 /c/src/lib/libbsp/powerpc/shared/startup/bspstart.c | |
| parent | 2008-08-20 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-cc981e11bcab3aebca6c35197273ccb214ebfc5f.tar.bz2 | |
Add missing prototypes.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/shared/startup/bspstart.c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/shared/startup/bspstart.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c index b5c0b7333e..10f49be8f7 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @@ -38,20 +38,20 @@ #include <bsp/motorola.h> #include <rtems/powerpc/powerpc.h> -extern void _return_to_ppcbug(); +extern void _return_to_ppcbug(void); extern unsigned long __rtems_end[]; -extern void L1_caches_enables(); -extern unsigned get_L2CR(); +extern void L1_caches_enables(void); +extern unsigned get_L2CR(void); extern void set_L2CR(unsigned); extern void bsp_cleanup(void); -extern Triv121PgTbl BSP_pgtbl_setup(); -extern void BSP_pgtbl_activate(); -extern void BSP_vme_config(); +extern Triv121PgTbl BSP_pgtbl_setup(unsigned long); +extern void BSP_pgtbl_activate(Triv121PgTbl); +extern void BSP_vme_config(void); SPR_RW(SPRG1) #if defined(DEBUG_BATS) -extern void ShowBATS();` +extern void ShowBATS(void); #endif /* @@ -132,7 +132,7 @@ unsigned int EUMBBAR; * Register (EUMBBAR) as read from the processor configuration register using * Processor Address Map B (CHRP). */ -unsigned int get_eumbbar() { +unsigned int get_eumbbar(void) { out_le32( (uint32_t*)0xfec00000, 0x80000078 ); return in_le32( (uint32_t*)0xfee00000 ); } |