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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-05-14 17:10:17 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-05-14 17:10:17 +0000
commit69ed59f083a083fd96d08b5f6d54f2c80f267f03 (patch)
tree3d8fcd08bcface88cea636117b47dd1520b2874c /c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
parent2001-05-14 Till Straumann <strauman@slac.stanford.edu> (diff)
downloadrtems-69ed59f083a083fd96d08b5f6d54f2c80f267f03.tar.bz2
2001-05-14 Till Straumann <strauman@slac.stanford.edu>
* bootloader/misc.c, console/Makefile.am, console/console.c, console/consoleIo.h, console/inch.c, console/polled_io.c, console/uart.c, console/uart.h, include/bsp.h, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_init.c, openpic/openpic.c, openpic/openpic.h, pci/Makefile.am, pci/pci.c, pci/pci.h, residual/Makefile.am, start/start.S, startup/bspstart.c, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c: Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably with the goal to make it more flexible and reusable by other BSPs. The main strategies were: - eliminate hardcoded base addresses; devices use offsets and a BSP defined base address. - separate functionality into different files (e.g. reboot from inch.c to reboot.c) which can be overridden by a 'derived' BSP. - separate initialization code into separate files (e.g. PCI bridge detection/initialization was separated from the more generic PCI access routines), also to make it easier for 'derived' BSPs to substitute their own initialization code. There are also a couple of enhancements and fixes: - IRQ handling code now has a hook for attaching a VME bridge. - OpenPIC is now explicitely initialized (polarities, senses). Eliminated the implicit assumption on the presence of an ISA PIC. - UART and console driver now supports more than 1 port. The current maximum of 2 can easily be extended by enlarging a table (it would even be easier if the ISR API was not broken by design). - fixed polled_io.c so it correctly supports console on COM2 - fixed TLB invalidation code (start.S). - exception handler prints a stack backtrace. - added BSP_pciFindDevice() to scan the pci bus for a particular vendor/device/instance.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/shared/startup/bspstart.c')
-rw-r--r--c/src/lib/libbsp/powerpc/shared/startup/bspstart.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
index 04c6f48b8d..0c0ac29382 100644
--- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
@@ -200,6 +200,10 @@ void bsp_start( void )
* so that It can be printed without accessing R1.
*/
stack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
+
+ /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
+ *((unsigned32 *)stack) = 0;
+
/*
* Initialize the interrupt related settings
* SPRG0 = interrupt nesting level count
@@ -209,6 +213,10 @@ void bsp_start( void )
* some settings below...
*/
intrStack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
+
+ /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
+ *((unsigned32 *)intrStack) = 0;
+
asm volatile ("mtspr 273, %0" : "=r" (intrStack) : "0" (intrStack));
asm volatile ("mtspr 272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
/*
@@ -228,7 +236,8 @@ void bsp_start( void )
* PCI devices memory area. Needed to access OPENPIC features
* provided by the RAVEN
*/
- setdbat(2, 0xc0000000, 0xc0000000, 0x08000000, IO_PAGE);
+ /* T. Straumann: give more PCI address space */
+ setdbat(2, 0xc0000000, 0xc0000000, 0x10000000, IO_PAGE);
/*
* Must have acces to open pic PCI ACK registers
* provided by the RAVEN