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authorTill Straumann <strauman@slac.stanford.edu>2007-11-21 08:03:30 +0000
committerTill Straumann <strauman@slac.stanford.edu>2007-11-21 08:03:30 +0000
commit5a8e5df7d4f5031d17aecfc6766141b9e75977e7 (patch)
treee81c4afb579d60435b9fa8692c9ddb7184cf5c4a /c/src/lib/libbsp/powerpc/shared/pci
parent2007-11-20 Till Straumann <strauman@slac.stanford.edu> (diff)
downloadrtems-5a8e5df7d4f5031d17aecfc6766141b9e75977e7.tar.bz2
2007-11-21 Till Straumann <strauman@slac.stanford.edu>
* Makefile.am, motorola_powerpc/Makefile.am, * shared/pci/detect_raven_bridge.c, Makefile.am, * shared/pci/generic_clear_hberrs.c: separated the generic version of _BSP_clear_hostbridge_errors() into its own file.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/shared/pci')
-rw-r--r--c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c49
-rw-r--r--c/src/lib/libbsp/powerpc/shared/pci/generic_clear_hberrs.c67
2 files changed, 68 insertions, 48 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
index 265af0fe0f..c29fa04660 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
@@ -32,53 +32,6 @@
extern const pci_config_access_functions pci_direct_functions;
extern const pci_config_access_functions pci_indirect_functions;
-
-#define PCI_ERR_BITS 0xf900
-#define PCI_STATUS_OK(x) (!((x)&PCI_ERR_BITS))
-
-/* For now, just clear errors in the PCI status reg.
- *
- * Returns: (for diagnostic purposes)
- * original settings (i.e. before applying the clearing
- * sequence) or the error bits or 0 if there were no errors.
- *
- */
-
-unsigned long
-_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
-{
-unsigned long rval;
-unsigned short pcistat;
-int count;
-
- if (enableMCP)
- return -1; /* exceptions not supported / MCP not wired */
-
- /* read error status for info return */
- pci_read_config_word(0,0,0,PCI_STATUS,&pcistat);
- rval = pcistat;
-
- count=10;
- do {
- /* clear error reporting registers */
-
- /* clear PCI status register */
- pci_write_config_word(0,0,0,PCI_STATUS, PCI_ERR_BITS);
-
- /* read new status */
- pci_read_config_word(0,0,0,PCI_STATUS, &pcistat);
-
- } while ( ! PCI_STATUS_OK(pcistat) && count-- );
-
- if ( !PCI_STATUS_OK(rval) && !quiet) {
- printk("Cleared PCI errors: pci_stat was 0x%04x\n", rval);
- }
- if ( !PCI_STATUS_OK(pcistat) ) {
- printk("Unable to clear PCI errors: still 0x%04x after 10 attempts\n", pcistat);
- }
- return rval & PCI_ERR_BITS;
-}
-
#if (defined(mpc8240) || defined(mpc8245))
/* FIXME - this should really be in a separate file - the 2100 doesn't
* have a raven chip so there is no point having 2100 code here
@@ -112,7 +65,7 @@ void detect_host_bridge()
* API, sigh...).
* So for the moment, we just don't use MCP on all mvme2xxx
* boards (using the generic, hostbridge-independent 'clear'
- * implementation above).
+ * implementation [generic_clear_hberrs.c]).
*/
/*
* enableMCP: whether to enable MCP checkstop / machine check interrupts
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/generic_clear_hberrs.c b/c/src/lib/libbsp/powerpc/shared/pci/generic_clear_hberrs.c
new file mode 100644
index 0000000000..febe7601d0
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/shared/pci/generic_clear_hberrs.c
@@ -0,0 +1,67 @@
+/*
+ * $Id$
+ */
+
+#include <libcpu/io.h>
+#include <libcpu/spr.h>
+
+#include <bsp.h>
+#include <bsp/pci.h>
+
+#include <rtems/bspIo.h>
+
+#define PCI_ERR_BITS 0xf900
+#define PCI_STATUS_OK(x) (!((x)&PCI_ERR_BITS))
+
+/* For now, just clear errors in the PCI status reg.
+ *
+ * Returns: (for diagnostic purposes)
+ * original settings (i.e. before applying the clearing
+ * sequence) or the error bits or 0 if there were no errors.
+ *
+ */
+
+unsigned short
+(*_BSP_clear_vmebridge_errors)(int) = 0;
+
+unsigned long
+_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
+{
+unsigned long rval;
+unsigned short pcistat;
+int count;
+
+ if (enableMCP)
+ return -1; /* exceptions not supported / MCP not wired */
+
+ /* read error status for info return */
+ pci_read_config_word(0,0,0,PCI_STATUS,&pcistat);
+ rval = pcistat;
+
+ count=10;
+ do {
+ /* clear error reporting registers */
+
+ /* clear PCI status register */
+ pci_write_config_word(0,0,0,PCI_STATUS, PCI_ERR_BITS);
+
+ /* read new status */
+ pci_read_config_word(0,0,0,PCI_STATUS, &pcistat);
+
+ } while ( ! PCI_STATUS_OK(pcistat) && count-- );
+
+ if ( !PCI_STATUS_OK(rval) && !quiet) {
+ printk("Cleared PCI errors: pci_stat was 0x%04x\n", rval);
+ }
+ if ( !PCI_STATUS_OK(pcistat) ) {
+ printk("Unable to clear PCI errors: still 0x%04x after 10 attempts\n", pcistat);
+ }
+
+ rval &= PCI_ERR_BITS;
+
+ /* Some VME bridges (Tsi148) don't propagate VME bus errors to PCI status reg. */
+ if ( _BSP_clear_vmebridge_errors )
+ rval |= _BSP_clear_vmebridge_errors(quiet)<<16;
+
+ return rval;
+}