2001-05-14 Till Straumann <strauman@slac.stanford.edu>

	* bootloader/misc.c, console/Makefile.am, console/console.c,
	console/consoleIo.h, console/inch.c, console/polled_io.c,
	console/uart.c, console/uart.h, include/bsp.h, irq/Makefile.am,
	irq/irq.c, irq/irq.h, irq/irq_init.c, openpic/openpic.c,
	openpic/openpic.h, pci/Makefile.am, pci/pci.c, pci/pci.h,
	residual/Makefile.am, start/start.S, startup/bspstart.c,
	vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c:
	Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably
	with the goal to make it more flexible and reusable by other
	BSPs. The main strategies were:
	    - eliminate hardcoded base addresses; devices use offsets
	      and a BSP defined base address.
	    - separate functionality into different files (e.g. reboot from
	      inch.c to reboot.c) which can be overridden by a 'derived' BSP.
	    - separate initialization code into separate files (e.g.  PCI
	      bridge detection/initialization was separated from the more
	      generic PCI access routines), also to make it easier for
	      'derived' BSPs to substitute their own initialization code.
	There are also a couple of enhancements and fixes:
	    - IRQ handling code now has a hook for attaching a VME bridge.
	    - OpenPIC is now explicitely initialized (polarities, senses).
	      Eliminated the implicit assumption on the presence of an ISA PIC.
	    - UART and console driver now supports more than 1 port. The current
	      maximum of 2 can easily be extended by enlarging a table (it
	      would even be easier if the ISR API was not broken by design).
	    - fixed polled_io.c so it correctly supports console on COM2
	    - fixed TLB invalidation code (start.S).
	    - exception handler prints a stack backtrace.
	    - added BSP_pciFindDevice() to scan the pci bus for a particular
	      vendor/device/instance.

1 files changed, 16 insertions, 102 deletions

diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.c b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
index 233a2efc00..a6d615cea6 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
@@ -14,26 +14,27 @@
  *  http://www.OARcorp.com/rtems/license.html.
  *
  *  $Id$
+ *
+ *  Till Straumann, <strauman@slac.stanford.edu>, 1/2002
+ *   - separated bridge detection code out of this file
  */
 
-#include <bsp/consoleIo.h>
 #include <libcpu/io.h>
 #include <bsp/pci.h>
-#include <bsp/residual.h>
-#include <bsp/openpic.h>
-#include <bsp.h>
 
+/* allow for overriding these definitions */
+#ifndef PCI_CONFIG_ADDR
 #define PCI_CONFIG_ADDR			0xcf8
+#endif
+#ifndef PCI_CONFIG_DATA
 #define PCI_CONFIG_DATA			0xcfc
+#endif
+
 #define PCI_INVALID_VENDORDEVICEID	0xffffffff
 #define PCI_MULTI_FUNCTION		0x80
-#define RAVEN_MPIC_IOSPACE_ENABLE	0x1
-#define RAVEN_MPIC_MEMSPACE_ENABLE	0x2
-#define RAVEN_MASTER_ENABLE		0x4
-#define RAVEN_PARITY_CHECK_ENABLE	0x40
-#define RAVEN_SYSTEM_ERROR_ENABLE	0x100
-#define RAVEN_CLEAR_EVENTS_MASK		0xf9000000
 
+/* define a shortcut */
+#define pci	BSP_pci_configuration
 
 /*
  * Bit encode for PCI_CONFIG_HEADER_TYPE register
@@ -106,7 +107,7 @@ indirect_pci_write_config_dword(unsigned char bus, unsigned char slot,
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static const pci_config_access_functions indirect_functions = {
+const pci_config_access_functions pci_indirect_functions = {
   	indirect_pci_read_config_byte,
   	indirect_pci_read_config_word,
   	indirect_pci_read_config_dword,
@@ -115,9 +116,9 @@ static const pci_config_access_functions indirect_functions = {
   	indirect_pci_write_config_dword
 };
 
-pci_config pci = {(volatile unsigned char*)PCI_CONFIG_ADDR,
+pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR,
 			 (volatile unsigned char*)PCI_CONFIG_DATA,
-			 &indirect_functions};
+			 &pci_indirect_functions};
 
 static int
 direct_pci_read_config_byte(unsigned char bus, unsigned char slot,
@@ -205,7 +206,7 @@ direct_pci_write_config_dword(unsigned char bus, unsigned char slot,
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static const pci_config_access_functions direct_functions = {
+const pci_config_access_functions pci_direct_functions = {
   	direct_pci_read_config_byte,
   	direct_pci_read_config_word,
   	direct_pci_read_config_dword,
@@ -215,99 +216,12 @@ static const pci_config_access_functions direct_functions = {
 };
 
 
-void detect_host_bridge()
-{
-  PPC_DEVICE *hostbridge;
-  unsigned int id0;
-  unsigned int tmp;
-  
-  /*
-   * This code assumes that the host bridge is located at
-   * bus 0, dev 0, func 0 AND that the old pre PCI 2.1
-   * standart devices detection mecahnism that was used on PC
-   * (still used in BSD source code) works.
-   */
-  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL, 
-				  BridgeController,
-				  PCIBridge, -1, 0);
-  if (hostbridge) {
-    if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
-      pci.pci_functions=&indirect_functions;
-      /* Should be extracted from residual data, 
-       * indeed MPC106 in CHRP mode is different,
-       * but we should not use residual data in
-       * this case anyway. 
-       */
-      pci.pci_config_addr = ((volatile unsigned char *) 
-			      (ptr_mem_map->io_base+0xcf8));
-      pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
-    } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
-      pci.pci_functions=&direct_functions;
-      pci.pci_config_data=(unsigned char *) 0x80800000;
-    } else {
-    }
-  } else {
-    /* Let us try by experimentation at our own risk! */
-    pci.pci_functions = &direct_functions;
-    /* On all direct bridges I know the host bridge itself
-     * appears as device 0 function 0. 
-		 */
-    pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
-    if (id0==~0U) {
-      pci.pci_functions = &indirect_functions;
-      pci.pci_config_addr = ((volatile unsigned char*)
-			      (ptr_mem_map->io_base+0xcf8));
-      pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);
-    }
-    /* Here we should check that the host bridge is actually
-     * present, but if it not, we are in such a desperate
-     * situation, that we probably can't even tell it.
-     */
-  }
-  pci_read_config_dword(0, 0, 0, 0, &id0);
-  if(id0 == PCI_VENDOR_ID_MOTOROLA +
-     (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
-    /*
-     * We have a Raven bridge. We will get information about its settings
-     */
-    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
-#ifdef SHOW_RAVEN_SETTING    
-    printk("RAVEN PCI command register = %x\n",id0);
-#endif    
-    id0 |= RAVEN_CLEAR_EVENTS_MASK;
-    pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
-    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
-#ifdef SHOW_RAVEN_SETTING    
-    printk("After error clearing RAVEN PCI command register = %x\n",id0);
-#endif    
-    
-    if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
-      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
-#ifdef SHOW_RAVEN_SETTING    
-      printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
-#endif    
-    }
-    if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
-      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
-#ifdef SHOW_RAVEN_SETTING    
-      printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
-#endif    
-      OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
-      printk("OpenPIC found at %p.\n",
-	     OpenPIC);
-    }
-  }
-  if (OpenPIC == (volatile struct OpenPIC *)0) {
-    BSP_panic("OpenPic Not found\n");
-  }
-
-}
-
 /*
  * This routine determines the maximum bus number in the system
  */
 void InitializePCI()
 {
+  extern void detect_host_bridge();
   unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
   unsigned char ucHeader;
   unsigned char ucMaxSubordinate;