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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-06-12 15:00:15 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-06-12 15:00:15 +0000 |
| commit | df49c60c9671e4a28e636964d744c1f59fb6cb68 (patch) | |
| tree | eabd85e189514ad412a35414ba5d483dcda3ef1f /c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S | |
| parent | Purged as many egcs references as possible. (diff) | |
| download | rtems-df49c60c9671e4a28e636964d744c1f59fb6cb68.tar.bz2 | |
Merged from 4.5.0-beta3a
Diffstat (limited to 'c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S index 0d8ab62452..9e77146e11 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S @@ -85,8 +85,15 @@ SYM (shared_raw_irq_code_entry): stw r2, SRR1_FRAME_OFFSET(r1) /* * Enable data and instruction address translation, exception recovery + * + * also, on CPUs with FP, enable FP so that FP context can be + * saved and restored (using FP instructions) */ +#if (PPC_HAS_FPU == 0) ori r3, r3, MSR_RI | MSR_IR | MSR_DR +#else + ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP +#endif mtmsr r3 SYNC /* |