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authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-02-17 09:23:59 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-02-19 09:59:38 +0100
commit801b5d80325dbd3e92218271d54e75f389da7136 (patch)
treed804e85db347bafd1c7b52b086beff7b6d61c170 /c/src/lib/libbsp/powerpc/score603e/startup
parentscore: Move SMP interrupt stack initialization (diff)
downloadrtems-801b5d80325dbd3e92218271d54e75f389da7136.tar.bz2
powerpc: Change interrupt disable implemetation
Instead of SPRG0 (= special purpose register 272) use the new global symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask. The benefit is that it is now possible to disable interrupts without further run-time initialization in boot_card(). At least on Freescale e500 cores this leads also to a faster execution since the mfmsr and mfspr instruction require four cycles to complete. The instructions to load the mask value can execute while the mfmsr is in progress.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/startup')
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
index 3519a59f3b..8caf955835 100644
--- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
@@ -194,11 +194,7 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
- ppc_exc_initialize(
- PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
- intrStackStart,
- intrStackSize
- );
+ ppc_exc_initialize(intrStackStart, intrStackSize);
msr_value = 0x2030;
_CPU_MSR_SET( msr_value );