diff options
author | Jennifer Averett <Jennifer.Averett@OARcorp.com> | 2009-05-05 16:24:04 +0000 |
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committer | Jennifer Averett <Jennifer.Averett@OARcorp.com> | 2009-05-05 16:24:04 +0000 |
commit | 42b6dd2a53ce85e13ab00611fb5a3fdb2c40ee92 (patch) | |
tree | 4a043f0b2ef77473753131fed17c4dc95bc18807 /c/src/lib/libbsp/powerpc/score603e/startup | |
parent | 2009-05-05 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
download | rtems-42b6dd2a53ce85e13ab00611fb5a3fdb2c40ee92.tar.bz2 |
2009-05-05 Jennifer Averett <jennifer.averett@OARcorp.com>
* Makefile.am, configure.ac, preinstall.am, PCI_bus/PCI.c,
PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c,
console/85c30.h, console/console.c, console/consolebsp.h,
console/tbl85c30.c, include/bsp.h, include/gen2.h,
include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h,
irq/irq_init.c, start/start.S, startup/Hwr_init.c,
startup/bspstart.c, startup/linkcmds, timer/timer.c, tod/tod.c,
vme/VMEConfig.h: Updated and tested with latest interrupt source.
Modified with latest memory allocation, but this needs testing.
* irq/no_pic.c: New file.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/startup')
-rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c | 11 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c | 158 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/startup/linkcmds | 15 |
3 files changed, 78 insertions, 106 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c b/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c index 30c93c0355..5c71aa2851 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c @@ -1,5 +1,6 @@ -/* - * COPYRIGHT (c) 1989-2008. +/* Hwr_init.c + * + * COPYRIGHT (c) 1989-2009. * On-Line Applications Research Corporation (OAR). * * The license and distribution terms for this file may be @@ -88,8 +89,6 @@ void init_PCI(void) { /* DINK Monitor setsup and uses all 4 BAT registers. */ /* The fourth BAT register can be modified to access this area */ - - printk("init_PCI:\n"); } #define PPC_Get_HID0( _value ) \ @@ -114,7 +113,7 @@ void init_PCI(void) ); \ } while (0) -void instruction_cache_enable () +void instruction_cache_enable (void) { uint32_t value; @@ -129,7 +128,7 @@ void instruction_cache_enable () PPC_Set_HID0( value ); } -void data_cache_enable () +void data_cache_enable (void) { uint32_t value; diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c index a2e416729e..d5a8cc8af2 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @@ -1,14 +1,15 @@ -/* +/* bspstart.c + * * This set of routines starts the application. It includes application, * board, and monitor specific initialization and configuration. * The generic CPU dependent initialization has been performed * before any of these are invoked. * - * COPYRIGHT (c) 1989-2008. + * COPYRIGHT (c) 1989-2009. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * * $Id$ @@ -17,10 +18,12 @@ #include <string.h> #include <bsp.h> -#include <rtems/bspIo.h> #include <rtems/libio.h> +#include <rtems/libcsupport.h> +#include <rtems/bspIo.h> #include <libcpu/cpuIdent.h> -#define DEBUG 1 + +#define DEBUG 0 /* * Where the heap starts; is used by bsp_pretasking_hook; @@ -28,33 +31,33 @@ unsigned int BSP_heap_start; /* - * Total RAM available and associated linker symbol - */ -unsigned int BSP_mem_size; -extern char RamSize[]; - -/* * PCI Bus Frequency */ -unsigned int BSP_bus_frequency; /* XXX - Set this based upon the Score board */ +unsigned int BSP_bus_frequency; /* * processor clock frequency */ -unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */ +unsigned int BSP_processor_frequency; /* * Time base divisior (how many tick for 1 second). */ unsigned int BSP_time_base_divisor = 4000; -extern unsigned long __rtems_end[]; - /* * Driver configuration parameters */ uint32_t bsp_clicks_per_usec; +/* + * Memory on this board. + */ +extern char RamSize[]; +uint32_t BSP_mem_size; + +extern unsigned long __rtems_end[]; + void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); @@ -68,16 +71,30 @@ void _BSP_Fatal_error(unsigned int v) } /* + * Use the shared implementations of the following routines + */ + +void bsp_libc_init( void *, uint32_t, int ); + +/*PAGE + * * bsp_predriver_hook * * Before drivers are setup initialize interupt vectors. */ -void init_RTC(); -void initialize_PMC(); +void init_RTC(void); +void initialize_PMC(void); void bsp_predriver_hook(void) { + init_PCI(); + initialize_universe(); + + #if DEBUG + printk("bsp_predriver_hook: initialize_PCI_bridge\n"); + #endif + initialize_PCI_bridge (); #if (HAS_PMC_PSC8) #if DEBUG @@ -97,7 +114,7 @@ void bsp_predriver_hook(void) * initialize_PMC */ -void initialize_PMC() { +void initialize_PMC(void) { volatile uint32_t *PMC_addr; uint32_t data; @@ -131,37 +148,6 @@ void initialize_PMC() { /*PAGE * - * bsp_postdriver_hook - * - * Standard post driver hook plus some BSP specific stuff. - */ - -void bsp_postdriver_hook(void) -{ - extern void Init_EE_mask_init(void); - extern void open_dev_console(void); - - #if DEBUG - printk("bsp_postdriver_hook: initialize libio\n"); - #endif - if (rtems_libio_supp_helper) - (*rtems_libio_supp_helper)(); - ShowBATS(); - - #if DEBUG - printk("bsp_postdriver_hook: Init_EE_mask_init\n"); - #endif - Init_EE_mask_init(); - ShowBATS(); - #if DEBUG - printk("bsp_postdriver_hook: Finished procedure\n"); - #endif -} - -void bsp_set_trap_vectors( void ); - -/*PAGE - * * bsp_start * * This routine does the bulk of the system initialization. @@ -169,13 +155,14 @@ void bsp_set_trap_vectors( void ); void bsp_start( void ) { + unsigned char *work_space_start; unsigned int msr_value = 0x0000; uint32_t intrStackStart; uint32_t intrStackSize; - volatile uint32_t *ptr; + volatile uint32_t *ptr; ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; - + rtems_bsp_delay( 1000 ); /* @@ -185,12 +172,6 @@ void bsp_start( void ) printk("bsp_start: Zero out lots of memory\n"); #endif - memset( - &end, - 0, - (unsigned char *)&RAM_END - (unsigned char *) &end - ); - BSP_processor_frequency = 266000000; BSP_bus_frequency = 66000000; @@ -209,9 +190,13 @@ void bsp_start( void ) */ intrStackStart = (uint32_t) __rtems_end; intrStackSize = rtems_configuration_get_interrupt_stack_size(); + printk("Interrupt Stack Start: 0x%x Size: 0x%x Heap Start: 0x%x\n", + intrStackStart, intrStackSize, BSP_heap_start + ); - BSP_heap_start = intrStackStart + intrStackSize; - BSP_mem_size = (uintptr_t) RamSize; + BSP_mem_size = RamSize; + printk("BSP_mem_size: 0x%x\n", BSP_mem_size ); + /* * Initialize default raw exception handlers. @@ -221,24 +206,10 @@ void bsp_start( void ) intrStackStart, intrStackSize ); - #if DEBUG - printk("bsp_predriver_hook: init_RTC\n"); - #endif - -/* init_RTC(); */ - init_PCI(); - initialize_universe(); - - #if DEBUG - printk("bsp_predriver_hook: initialize_PCI_bridge\n"); - #endif - initialize_PCI_bridge (); msr_value = 0x2030; _CPU_MSR_SET( msr_value ); - - - _CPU_MSR_SET( msr_value ); + asm volatile("sync; isync"); /* * initialize the device driver parameters @@ -246,26 +217,29 @@ void bsp_start( void ) #if DEBUG printk("bsp_start: set clicks poer usec\n"); #endif - bsp_clicks_per_usec = 66 / 4; /* XXX get from linkcmds */ - -#if ( PPC_USE_DATA_CACHE ) - #if DEBUG - printk("bsp_start: cache_enable\n"); + bsp_clicks_per_usec = 66 / 4; + + #if ( PPC_USE_DATA_CACHE ) + #if DEBUG + printk("bsp_start: cache_enable\n"); + #endif + instruction_cache_enable (); + data_cache_enable (); + #if DEBUG + printk("bsp_start: END PPC_USE_DATA_CACHE\n"); + #endif #endif - instruction_cache_enable (); - data_cache_enable (); - #if DEBUG - printk("bsp_start: END PPC_USE_DATA_CACHE\n"); - #endif -#endif - - /* Initalize interrupt support */ - if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) { - BSP_panic( "Cannot intitialize interrupt support\n"); - } + /* + * Initalize RTEMS IRQ system + */ + #if DEBUG + printk("bspstart: Call BSP_rtems_irq_mng_init\n"); + #endif + BSP_rtems_irq_mng_init(0); + #if DEBUG printk("bsp_start: end BSPSTART\n"); - ShowBATS(); + ShowBATS(); #endif } diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/linkcmds b/c/src/lib/libbsp/powerpc/score603e/startup/linkcmds index 0b2a9f2073..5e8494afb0 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/linkcmds +++ b/c/src/lib/libbsp/powerpc/score603e/startup/linkcmds @@ -177,7 +177,6 @@ SECTIONS PROVIDE (_edata = .); PROVIDE (RAM_END = ADDR(.text) + 10M); . = ALIGN(8) + 0x1000; - PROVIDE (__SBSS_START__ = .); .sbss : { PROVIDE (__sbss_start = .); @@ -186,19 +185,19 @@ SECTIONS *(.gnu.linkonce.sb.*) PROVIDE (__sbss_end = .); } >RAM - PROVIDE (__SBSS_END__ = .); .bss : { PROVIDE (__bss_start = .); *(.dynbss) *(.bss .bss* .gnu.linkonce.b*) *(COMMON) - . = ALIGN(8) + 0x8000; - PROVIDE (__stack = .); - _end = . ; - __rtems_end = . ; - PROVIDE (end = .); - } >RAM + } >RAM + . = ALIGN(16) + 0x8000; + PROVIDE (__stack = .); + __rtems_end = . ; + . = ALIGN(8) + 0x8000; + PROVIDE(_end = .); + PROVIDE(end = .); /* These are needed for ELF backends which have not yet been converted to the new style linker. */ |