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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-11-28 18:20:10 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-11-28 18:20:10 +0000
commitf5e7b4c36a00afccb90f7e87f667f068bcbb85ea (patch)
tree4ba9a6239e5cb0de7ee36ae289ef12fde89f050a /c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
parent2001-11-28 Joel Sherrill <joel@OARcorp.com>, (diff)
downloadrtems-f5e7b4c36a00afccb90f7e87f667f068bcbb85ea.tar.bz2
2001-11-28 Joel Sherrill <joel@OARcorp.com>,
This was tracked as PR87. * README, configure.ac, include/Makefile.am, include/bsp.h, start/start.S, startup/FPGA.c, startup/Makefile.am, tod/Makefile.am: Eliminated conditional code for generation 1 boards as these are no longer available. * include/gen1.h, startup/82378zb.c, tod/tod_g1.c: Deleted.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c')
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c b/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
index fb4d192b91..243f7a78e0 100644
--- a/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
+++ b/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
@@ -1,6 +1,6 @@
-/* FPGA.c
+/* FPGA.c -- Bridge for second and subsequent generations
*
- * COPYRIGHT (c) 1989-1997.
+ * COPYRIGHT (c) 1989-2001.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may in
@@ -11,7 +11,6 @@
*/
#include <bsp.h>
-#if (SCORE603E_GENERATION == 2)
#include <string.h>
#include <fcntl.h>
#include <assert.h>
@@ -164,6 +163,3 @@ rtems_unsigned16 read_and_clear_irq()
return irq;
}
-
-#endif /* end of generation 2 */
-