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authorRalf Corsépius <ralf.corsepius@rtems.org>2012-05-24 06:36:40 +0200
committerRalf Corsépius <ralf.corsepius@rtems.org>2012-05-24 07:16:50 +0200
commitdaffa606cc4a45d93c1f0f4fe365fde0fda6acbb (patch)
treee41223b3c92a63476eaa8b1618676a5500cea059 /c/src/lib/libbsp/powerpc/score603e/include
parentRevert "Revert "libtests/complex: Avoid generated files"" (diff)
downloadrtems-daffa606cc4a45d93c1f0f4fe365fde0fda6acbb.tar.bz2
Add bspopts.h.in.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/include')
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/include/bspopts.h.in75
1 files changed, 75 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/include/bspopts.h.in b/c/src/lib/libbsp/powerpc/score603e/include/bspopts.h.in
new file mode 100644
index 0000000000..cb78c29751
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/score603e/include/bspopts.h.in
@@ -0,0 +1,75 @@
+/* include/bspopts.h.in. Generated from configure.ac by autoheader. */
+
+/* enables the data cache, if defined to a value other than zero */
+#undef BSP_DATA_CACHE_ENABLED
+
+/* If defined, then the BSP Framework will put a non-zero pattern into the
+ RTEMS Workspace and C program heap. This should assist in finding code that
+ assumes memory starts set to zero. */
+#undef BSP_DIRTY_MEMORY
+
+/* enables the instruction cache, if defined to a value other than zero */
+#undef BSP_INSTRUCTION_CACHE_ENABLED
+
+/* If defined, print a message and wait until pressed before resetting board
+ when application exits. */
+#undef BSP_PRESS_KEY_FOR_RESET
+
+/* If defined, reset the board when the application exits. */
+#undef BSP_RESET_BOARD_AT_EXIT
+
+/* If defined then the BSP may reduce the available memory size initially.
+ This can be useful for debugging (reduce the core size) or dynamic loading
+ (std gcc text offsets/jumps are < +/-32M). Note that the policy can still
+ be defined by the application (see sbrk.c, BSP_sbrk_policy). By undefining
+ CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed and a little
+ memory is saved. */
+#undef CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+
+/* whether using console interrupts */
+#undef CONSOLE_USE_INTERRUPTS
+
+/* whether has a PSC8 PMC board attached to PMC slot */
+#undef HAS_PMC_PSC8
+
+/* FIXME: Missing explanation */
+#undef INITIALIZE_COM_PORTS
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the home page for this package. */
+#undef PACKAGE_URL
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* If defined, then the PowerPC specific code in RTEMS will use some of the
+ special purpose registers to slightly optimize interrupt response time. The
+ use of these registers can conflict with other tools like debuggers. */
+#undef PPC_USE_SPRG
+
+/* This defines the base address of the exception table. NOTE: Vectors are
+ actually at 0xFFF00000 but file starts at offset. */
+#undef PPC_VECTOR_FILE_BASE
+
+/* use Open Firmware ROM monitor */
+#undef SCORE603E_OPEN_FIRMWARE
+
+/* FIXME: Missing explanation. */
+#undef SCORE603E_USE_DINK
+
+/* use no ROM monitor */
+#undef SCORE603E_USE_NONE
+
+/* use SDS ROM monitor */
+#undef SCORE603E_USE_SDS