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author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 16:01:48 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 16:01:48 +0000 |
commit | f05b2ac0bc4626e854afc6e6a5d1b88071adbd7c (patch) | |
tree | 4150010cec9b6b51100f183b435955cd847679b4 /c/src/lib/libbsp/powerpc/score603e/include/gen2.h | |
parent | Remove stray white spaces. (diff) | |
download | rtems-f05b2ac0bc4626e854afc6e6a5d1b88071adbd7c.tar.bz2 |
Remove duplicate white lines.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/include/gen2.h')
-rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/include/gen2.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h index 64d9c10ba5..fbc78c3fe3 100644 --- a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h +++ b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h @@ -56,7 +56,6 @@ extern "C" { #define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \ ((volatile uint32_t*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset )) - #define SCORE603E_PMC_SERIAL_ADDRESS( _offset ) \ ((volatile uint8_t*)(SCORE603E_PCI_REGISTER_BASE + _offset)) @@ -91,7 +90,6 @@ extern "C" { #define SCORE603E_JP1_JP2_PROM_BASE 0xfff00000 #define SCORE603E_NOT_JP1_2_FLASH_BASE 0xff800000 - #if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE) #define SCORE603E_VME_A16_OFFSET 0x04000000 #elif (SCORE603E_USE_DINK) @@ -144,7 +142,6 @@ extern "C" { #define SCORE603E_85C30_4_CLOCK_X SCORE603E_85C30_PMC_CLOCK_X #define SCORE603E_85C30_5_CLOCK_X SCORE603E_85C30_PMC_CLOCK_X - #define SCORE603E_UNIVERSE_CHIP_ID 0x000010E3 /* @@ -172,7 +169,6 @@ extern "C" { #define PMC_SET_422_LOOPBACK(_word) (_word | 0x01) #define PMC_CLEAR_422_LOOPBACK(_word) (_word & 0xfe) - /* * Score603e Interupt Definations. */ @@ -239,7 +235,6 @@ extern "C" { #define MAX_BOARD_IRQS SCORE603E_IRQ19 - /* * BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID for the shared timer * driver. |