2009-05-05 Jennifer Averett <jennifer.averett@OARcorp.com>

	* Makefile.am, configure.ac, preinstall.am, PCI_bus/PCI.c,
	PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c,
	console/85c30.h, console/console.c, console/consolebsp.h,
	console/tbl85c30.c, include/bsp.h, include/gen2.h,
	include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h,
	irq/irq_init.c, start/start.S, startup/Hwr_init.c,
	startup/bspstart.c, startup/linkcmds, timer/timer.c, tod/tod.c,
	vme/VMEConfig.h: Updated and tested with latest interrupt source.
	Modified with latest memory allocation, but this needs testing.
	* irq/no_pic.c: New file.

1 files changed, 8 insertions, 67 deletions

diff --git a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
index 05b4847583..9b6ac15a37 100644
--- a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
+++ b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h
@@ -1,11 +1,12 @@
-/*
+/*  Gen2.h
+ *
  *  This include file contains all Generation 2 board addreses
  *
- *  COPYRIGHT (c) 1989-2008.
+ *  COPYRIGHT (c) 1989-2009.
  *  On-Line Applications Research Corporation (OAR).
  *
- *  The license and distribution terms for this file may in
- *  the file LICENSE in this distribution or at
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
  *
  *  $Id$
@@ -177,67 +178,6 @@ extern "C" {
  *  Score603e Interupt Definations.
  */
 
-/*
- * First Score Unique IRQ
- */
-#define Score_IRQ_First ( PPC_IRQ_LAST +  1 )
-
-/*
- * The Following Are part of a Score603e FPGA.
- */
-#define SCORE603E_IRQ00   ( Score_IRQ_First +  0 )
-#define SCORE603E_IRQ01   ( Score_IRQ_First +  1 )
-#define SCORE603E_IRQ02   ( Score_IRQ_First +  2 )
-#define SCORE603E_IRQ03   ( Score_IRQ_First +  3 )
-#define SCORE603E_IRQ04   ( Score_IRQ_First +  4 )
-#define SCORE603E_IRQ05   ( Score_IRQ_First +  5 )
-#define SCORE603E_IRQ06   ( Score_IRQ_First +  6 )
-#define SCORE603E_IRQ07   ( Score_IRQ_First +  7 )
-#define SCORE603E_IRQ08   ( Score_IRQ_First +  8 )
-#define SCORE603E_IRQ09   ( Score_IRQ_First +  9 )
-#define SCORE603E_IRQ10   ( Score_IRQ_First + 10 )
-#define SCORE603E_IRQ11   ( Score_IRQ_First + 11 )
-#define SCORE603E_IRQ12   ( Score_IRQ_First + 12 )
-#define SCORE603E_IRQ13   ( Score_IRQ_First + 13 )
-#define SCORE603E_IRQ14   ( Score_IRQ_First + 14 )
-#define SCORE603E_IRQ15   ( Score_IRQ_First + 15 )
-
-#define SCORE603E_TIMER1_IRQ           SCORE603E_IRQ00
-#define SCORE603E_TIMER2_IRQ           SCORE603E_IRQ01
-#define SCORE603E_TIMER3_IRQ           SCORE603E_IRQ02
-#define SCORE603E_85C30_1_IRQ          SCORE603E_IRQ03
-#define SCORE603E_85C30_0_IRQ          SCORE603E_IRQ04
-#define SCORE603E_RTC_IRQ              SCORE603E_IRQ05
-#define SCORE603E_PCI_IRQ_0            SCORE603E_IRQ06
-#define SCORE603E_PCI_IRQ_1            SCORE603E_IRQ07
-#define SCORE603E_PCI_IRQ_2            SCORE603E_IRQ08
-#define SCORE603E_PCI_IRQ_3            SCORE603E_IRQ09
-#define SCORE603E_UNIVERSE_IRQ         SCORE603E_IRQ10
-#define SCORE603E_1553_IRQ             SCORE603E_IRQ11
-#define SCORE603E_MAIL_BOX_IRQ_0       SCORE603E_IRQ12
-#define SCORE603E_MAIL_BOX_IRQ_1       SCORE603E_IRQ13
-#define SCORE603E_MAIL_BOX_IRQ_2       SCORE603E_IRQ14
-#define SCORE603E_MAIL_BOX_IRQ_3       SCORE603E_IRQ15
-
-/*
- * The Score FPGA maps all interrupts comming from the PMC card to
- * the FPGA interrupt SCORE603E_PCI_IRQ_0 the PMC status word must be
- * read to indicate which interrupt was chained to the FPGA.
- */
-#define SCORE603E_IRQ16   ( Score_IRQ_First + 16 )
-#define SCORE603E_IRQ17   ( Score_IRQ_First + 17 )
-#define SCORE603E_IRQ18   ( Score_IRQ_First + 18 )
-#define SCORE603E_IRQ19   ( Score_IRQ_First + 19 )
-
-/*
- * IRQ'a read from the PMC card
- */
-#define SCORE603E_85C30_4_IRQ          SCORE603E_IRQ16    /* SCC 422-1 */
-#define SCORE603E_85C30_2_IRQ          SCORE603E_IRQ17    /* SCC 232-1 */
-#define SCORE603E_85C30_5_IRQ          SCORE603E_IRQ18    /* SCC 422-2 */
-#define SCORE603E_85C30_3_IRQ          SCORE603E_IRQ19    /* SCC 232-2 */
-
-#define MAX_BOARD_IRQS                 SCORE603E_IRQ19
 
 /*
  *  BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID for the shared timer
@@ -263,8 +203,9 @@ extern "C" {
 #define BSP_Convert_decrementer( _value ) \
   (int) (((_value) * 4000) / 6667)
 
-#endif
-
 #ifdef __cplusplus
 }
 #endif
+
+#endif
+