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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-10-16 16:22:46 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-10-16 16:22:46 +0000 |
| commit | 9f6aaf7191a8a752ddaecec23f995b182ff5b47f (patch) | |
| tree | dc48943a2d9e467e03ca2419baee708ed85451bd /c/src/lib/libbsp/powerpc/score603e/configure.ac | |
| parent | 2009-10-16 Jennifer Averett <jennifer.averett@OARcorp.com> (diff) | |
| download | rtems-9f6aaf7191a8a752ddaecec23f995b182ff5b47f.tar.bz2 | |
2009-10-16 Jennifer Averett <jennifer@OARcorp.com>
* configure.ac: Default to having PSC8 mezzanine so code builds
all the time.
* startup/bspstart.c: Calibrated clock using an VMEBus controlled
discrete pulsed at a 20ms rate.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/configure.ac')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/configure.ac | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/configure.ac b/c/src/lib/libbsp/powerpc/score603e/configure.ac index a4e1694784..dcc323b628 100644 --- a/c/src/lib/libbsp/powerpc/score603e/configure.ac +++ b/c/src/lib/libbsp/powerpc/score603e/configure.ac @@ -37,7 +37,7 @@ RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0]) RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS], [whether using console interrupts]) -RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[0]) +RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[1]) RTEMS_BSPOPTS_HELP([HAS_PMC_PSC8], [whether has a PSC8 PMC board attached to PMC slot]) |