2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* configure.ac, startup/bspstart.c: Use standard cache BSP options.

1 files changed, 6 insertions, 9 deletions

diff --git a/c/src/lib/libbsp/powerpc/score603e/configure.ac b/c/src/lib/libbsp/powerpc/score603e/configure.ac
index 82a8cd0422..e7ffcdf2c2 100644
--- a/c/src/lib/libbsp/powerpc/score603e/configure.ac
+++ b/c/src/lib/libbsp/powerpc/score603e/configure.ac
@@ -15,6 +15,12 @@ RTEMS_PROG_CC_FOR_TARGET
 RTEMS_CANONICALIZE_TOOLS
 RTEMS_PROG_CCAS
 
+RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[])
+RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
+
+RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[])
+RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
+
 ## FIXME: This should be a 1 out of 3 selection
 ## and is somehow coupled to USE_DINK (cf. include/gen2.h)
 RTEMS_BSPOPTS_SET([SCORE603E_USE_SDS],[*],[0])
@@ -52,15 +58,6 @@ of the special purpose registers to slightly optimize interrupt
 response time.  The use of these registers can conflict with
 other tools like debuggers.])
 
-RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[0])
-RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
-[If defined, then the PowerPC specific code in RTEMS will use
- data cache instructions to optimize the context switch code.
- This code can conflict with debuggers or emulators.  It is known
- to break the Corelis PowerPC emulator with at least some combinations
- of PowerPC 603e revisions and emulator versions.
- The BSP actually contains the call that enables this.])
-
 RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
 RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
 [If defined then the BSP may reduce the available memory size