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author | Ralf Corsépius <ralf.corsepius@rtems.org> | 2012-05-24 06:36:40 +0200 |
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committer | Ralf Corsépius <ralf.corsepius@rtems.org> | 2012-05-24 07:16:50 +0200 |
commit | daffa606cc4a45d93c1f0f4fe365fde0fda6acbb (patch) | |
tree | e41223b3c92a63476eaa8b1618676a5500cea059 /c/src/lib/libbsp/powerpc/qoriq | |
parent | Revert "Revert "libtests/complex: Avoid generated files"" (diff) | |
download | rtems-daffa606cc4a45d93c1f0f4fe365fde0fda6acbb.tar.bz2 |
Add bspopts.h.in.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/qoriq')
-rw-r--r-- | c/src/lib/libbsp/powerpc/qoriq/include/bspopts.h.in | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/bspopts.h.in b/c/src/lib/libbsp/powerpc/qoriq/include/bspopts.h.in new file mode 100644 index 0000000000..917596f028 --- /dev/null +++ b/c/src/lib/libbsp/powerpc/qoriq/include/bspopts.h.in @@ -0,0 +1,98 @@ +/* include/bspopts.h.in. Generated from configure.ac by autoheader. */ + +/* default baud for console and other serial devices */ +#undef BSP_CONSOLE_BAUD + +/* enables the data cache, if defined to a value other than zero */ +#undef BSP_DATA_CACHE_ENABLED + +/* If defined, then the BSP Framework will put a non-zero pattern into the + RTEMS Workspace and C program heap. This should assist in finding code that + assumes memory starts set to zero. */ +#undef BSP_DIRTY_MEMORY + +/* disable U-Boot work area configuration */ +#undef BSP_DISABLE_UBOOT_WORK_AREA_CONFIG + +/* enables the instruction cache, if defined to a value other than zero */ +#undef BSP_INSTRUCTION_CACHE_ENABLED + +/* indicate that the interrupt stack is at the work area begin */ +#undef BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN + +/* If defined, print a message and wait until pressed before resetting board + when application exits. */ +#undef BSP_PRESS_KEY_FOR_RESET + +/* If defined, reset the board when the application exits. */ +#undef BSP_RESET_BOARD_AT_EXIT + +/* enable usage of interrupts for the UART modules */ +#undef BSP_USE_UART_INTERRUPTS + +/* enables U-Boot support */ +#undef HAS_UBOOT + +/* Define to the address where bug reports for this package should be sent. */ +#undef PACKAGE_BUGREPORT + +/* Define to the full name of this package. */ +#undef PACKAGE_NAME + +/* Define to the full name and version of this package. */ +#undef PACKAGE_STRING + +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the home page for this package. */ +#undef PACKAGE_URL + +/* Define to the version of this package. */ +#undef PACKAGE_VERSION + +/* global timer used for system clock, 0..3 maps to A0..A3, and 4..7 maps to + B0..B3 */ +#undef QORIQ_CLOCK_TIMER + +/* PHY address for eTSEC interface 1 */ +#undef QORIQ_ETSEC_1_PHY_ADDR + +/* PHY address for eTSEC interface 2 */ +#undef QORIQ_ETSEC_2_PHY_ADDR + +/* PHY address for eTSEC interface 3 */ +#undef QORIQ_ETSEC_3_PHY_ADDR + +/* initial MSR value */ +#undef QORIQ_INITIAL_MSR + +/* initial SPEFSCR value */ +#undef QORIQ_INITIAL_SPEFSCR + +/* inter-processor communication area begin */ +#undef QORIQ_INTERCOM_AREA_BEGIN + +/* inter-processor communication area size */ +#undef QORIQ_INTERCOM_AREA_SIZE + +/* use 1 to enable UART 0, otherwise use 0 */ +#undef QORIQ_UART_0_ENABLE + +/* use 1 to enable UART 1, otherwise use 0 */ +#undef QORIQ_UART_1_ENABLE + +/* use 1 to enable UART 0 to Intercom bridge, otherwise use 0 */ +#undef QORIQ_UART_BRIDGE_0_ENABLE + +/* use 1 to enable UART 1 to Intercom bridge, otherwise use 0 */ +#undef QORIQ_UART_BRIDGE_1_ENABLE + +/* UART to Intercom bridge master core index */ +#undef QORIQ_UART_BRIDGE_MASTER_CORE + +/* UART to Intercom bridge slave core index */ +#undef QORIQ_UART_BRIDGE_SLAVE_CORE + +/* UART to Intercom bridge task priority */ +#undef QORIQ_UART_BRIDGE_TASK_PRIORITY |