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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-17 09:23:59 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-19 09:59:38 +0100 |
commit | 801b5d80325dbd3e92218271d54e75f389da7136 (patch) | |
tree | d804e85db347bafd1c7b52b086beff7b6d61c170 /c/src/lib/libbsp/powerpc/qoriq/startup/smp.c | |
parent | score: Move SMP interrupt stack initialization (diff) | |
download | rtems-801b5d80325dbd3e92218271d54e75f389da7136.tar.bz2 |
powerpc: Change interrupt disable implemetation
Instead of SPRG0 (= special purpose register 272) use the new global
symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask.
The benefit is that it is now possible to disable interrupts without
further run-time initialization in boot_card().
At least on Freescale e500 cores this leads also to a faster execution
since the mfmsr and mfspr instruction require four cycles to complete.
The instructions to load the mask value can execute while the mfmsr is
in progress.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/qoriq/startup/smp.c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/qoriq/startup/smp.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c b/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c index 9caaa99a01..38a7305ea7 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c +++ b/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c @@ -116,7 +116,6 @@ void qoriq_secondary_cpu_initialize(void) /* Initialize exception handler */ ppc_exc_initialize_with_vector_base( - PPC_INTERRUPT_DISABLE_MASK_DEFAULT, (uintptr_t) second_cpu->interrupt_stack_low, rtems_configuration_get_interrupt_stack_size(), bsp_exc_vector_base |