./clock/Makefile.in,v

./clock/clock.c,v
./console/Makefile.in,v
./console/config.c,v
./console/console.c,v
./console/console.h,v
./console/debugio.c,v
./console/i8042.c,v
./console/i8042_p.h,v
./console/i8042vga.c,v
./console/i8042vga.h,v
./console/ns16550.c,v
./console/ns16550.h,v
./console/ns16550_p.h,v
./console/ns16550cfg.c,v
./console/ns16550cfg.h,v
./console/vga.c,v
./console/vga_p.h,v
./console/z85c30.c,v
./console/z85c30.h,v
./console/z85c30_p.h,v
./console/z85c30cfg.c,v
./console/z85c30cfg.h,v
./include/Makefile.in,v
./include/bsp.h,v
./include/chain.h,v
./include/coverhd.h,v
./include/extisrdrv.h,v
./include/nvram.h,v
./include/pci.h,v
./include/tod.h,v
./network/Makefile.in,v
./network/amd79c970.c,v
./network/amd79c970.h,v
./nvram/Makefile.in,v
./nvram/ds1385.h,v
./nvram/mk48t18.h,v
./nvram/nvram.c,v
./nvram/prepnvr.h,v
./nvram/stk11c68.h,v
./pci/Makefile.in,v
./pci/pci.c,v
./start/Makefile.in,v
./start/start.s,v
./startup/Makefile.in,v
./startup/bspclean.c,v
./startup/bspstart.c,v
./startup/bsptrap.s,v
./startup/device-tree,v
./startup/genpvec.c,v
./startup/linkcmds,v
./startup/rtems-ctor.cc,v
./startup/sbrk.c,v
./startup/setvec.c,v
./startup/spurious.c,v
./startup/swap.c,v
./timer/Makefile.in,v
./timer/timer.c,v
./tod/Makefile.in,v
./tod/cmos.h,v
./tod/tod.c,v
./universe/Makefile.in,v
./universe/universe.c,v
./vectors/Makefile.in,v
./vectors/README,v
./vectors/align_h.s,v
./vectors/vectors.s,v
./wrapup/Makefile.in,v
./Makefile.in,v
./README,v
./STATUS,v
./bsp_specs,v

10 files changed, 1395 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/Makefile.in b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/Makefile.in
new file mode 100644
index 0000000000..25464864d2
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/Makefile.in
@@ -0,0 +1,62 @@
+#
+#  $Id: 
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@:@srcdir@/../../../shared
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/startup.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=$(STARTUP_PIECES)
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .S
+S_PIECES=bsptrap
+S_FILES=$(S_PIECES:%=%.S)
+S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o)
+
+SRCS=linkcmds $(C_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+# Files expected to be from the shared directory:
+#  sbrk main bsplibc bsppost
+STARTUP_PIECES=bspstart bspclean sbrk setvec spurious genpvec swap \
+  main bsplibc bsppost
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+	$(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspclean.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspclean.c
new file mode 100644
index 0000000000..7a5db77049
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspclean.c
@@ -0,0 +1,30 @@
+/*
+ *  COPYRIGHT (c) 1998 by Radstone Technology
+ *
+ *
+ * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
+ * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
+ * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
+ *
+ * You are hereby granted permission to use, copy, modify, and distribute
+ * this file, provided that this notice, plus the above copyright notice
+ * and disclaimer, appears in all copies. Radstone Technology will provide
+ * no support for this code.
+ *
+ */
+/*
+ * bsp_cleanup()
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+extern void bsp_trap();
+
+void bsp_cleanup( void )
+{
+#if PPCN_60X_USE_DINK
+	bsp_trap();
+#endif
+}
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c
new file mode 100644
index 0000000000..e8ecd15472
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c
@@ -0,0 +1,305 @@
+/*
+ *  COPYRIGHT (c) 1998 by Radstone Technology
+ *
+ *
+ * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
+ * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
+ * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
+ *
+ * You are hereby granted permission to use, copy, modify, and distribute
+ * this file, provided that this notice, plus the above copyright notice
+ * and disclaimer, appears in all copies. Radstone Technology will provide
+ * no support for this code.
+ *
+ */
+/*  bspstart.c
+ *
+ *  This set of routines starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before any of these are invoked.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id: 
+ */
+
+#include <bsp.h>
+#include <pci.h>
+#include <rtems/libio.h>
+
+#include <libcsupport.h>
+
+unsigned char ucSystemType;
+unsigned char ucBoardRevMaj;
+unsigned char ucBoardRevMin;
+unsigned long ulMemorySize;
+unsigned long ulCpuBusClock;
+
+/*
+ * The bus speed is expressed in MHz
+ */
+static unsigned long ulBusSpeed[] = {
+	56250000,
+	60000000,
+	64300000,
+	66666667,
+	75000000,
+	83333333,
+	100000000,
+	66666667
+};
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+ 
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table         BSP_Configuration;
+
+rtems_cpu_table   Cpu_table;
+rtems_unsigned32  bsp_isr_level;
+
+static int stdin_fd, stdout_fd, stderr_fd;
+
+/*
+ * End of RTEMs image imported from linker
+ */
+extern int end;
+
+/*
+ *  Use the shared implementations of the following routines
+ */
+
+void bsp_postdriver_hook(void);
+void bsp_libc_init( void *, unsigned32, int );
+
+/*
+ *  bsp_pretasking_hook
+ *
+ *  BSP pretasking hook.  Called just before drivers are initialized.
+ *  Used to setup libc and install any BSP extensions.
+ */
+
+void bsp_pretasking_hook(void)
+{
+        rtems_unsigned32 heap_start;
+        rtems_unsigned32 heap_size;
+
+        heap_start = (rtems_unsigned32) &end;
+        if (heap_start & (CPU_ALIGNMENT-1))
+          heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+        heap_size = BSP_Configuration.work_space_start - (void *)&end;
+        heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
+
+        bsp_libc_init((void *) heap_start, heap_size, 0);
+
+	/*
+	 * Initialise RTC hooks based on system type
+	 */
+	InitializeRTC();
+
+	/*
+	 * Initialise NvRAM hooks based on system type
+	 */
+	InitializeNvRAM();
+
+	/*
+	 * Initialise the PCI bus(ses)
+	 */
+	InitializePCI();
+
+	/*
+	 * Initialize the Universe PCI-VME bridge
+	 */
+	InitializeUniverse();
+
+
+#ifdef RTEMS_DEBUG
+  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+
+}
+
+/*
+ *  bsp_std_close
+ *
+ *  Simple routine to close all standard IO streams.
+ */
+
+void bsp_std_close( void )
+{
+	close(stdin_fd);
+	close(stdout_fd);
+	close(stderr_fd);
+}
+ 
+
+/*
+ *  bsp_predriver_hook
+ *
+ *  Before drivers are setup.
+ */ 
+void bsp_predriver_hook(void)
+{
+  /* bsp_spurious_initialize; ??*/
+  initialize_external_exception_vector();
+}
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+	unsigned char *work_space_start;
+	unsigned char ucBoardRev, ucMothMemType, ucEquipPres1, ucEquipPres2;
+	unsigned16	usPVR=0;
+	unsigned8	ucTempl, ucTemph;
+	unsigned8	ucBanksPresent;
+	unsigned8	ucSimmPresent;
+	unsigned32	ulCurBank, ulTopBank;
+
+	/*
+	 * Determine system type
+	 */
+	inport_byte(&((PPLANARREGISTERS)0)->MotherboardMemoryType, ucMothMemType);
+	inport_byte(&((PPLANARREGISTERS)0)->SimmPresent, ucSimmPresent);
+
+	inport_byte(&((PPLANARREGISTERS)0)->EquipmentPresent1, ucEquipPres1);
+	inport_byte(&((PPLANARREGISTERS)0)->EquipmentPresent2, ucEquipPres2);
+	ucSystemType=((ucMothMemType&0x03)<<1) | ((ucEquipPres1&0x80)>>7);
+	ucSystemType^=7;
+
+	/*
+	 * Determine board revision for use by rev. specific code
+	 */
+	inport_byte(&((PPLANARREGISTERS)0)->BoardRevision, ucBoardRev);
+	ucBoardRevMaj=ucBoardRev>>5;
+	ucBoardRevMin=ucBoardRev&0x1f;
+
+	/*
+	 * Determine the memory size by reading the end address for top
+	 * assigned bank in the memory controller
+	 */
+	(void)PCIConfigRead8(0,0,0,0xa0, &ucBanksPresent);
+	for(ulCurBank=0;ulCurBank<8;ulCurBank++)
+	{
+		if((ucBanksPresent>>ulCurBank)&0x01)
+		{
+			ulTopBank=ulCurBank;
+		}
+	}
+
+	(void)PCIConfigRead8(0,0,0,0x90+ulTopBank, &ucTempl);
+	(void)PCIConfigRead8(0,0,0,0x98+ulTopBank, &ucTemph);
+	ulMemorySize=(ucTempl+(ucTemph<<8)+1)<<20;
+#if PPCN_60X_USE_DINK
+	ulMemorySize=0x01fe0000;
+#endif
+
+	/*
+	 * Determine processor bus clock
+	 */
+	asm volatile ("mfpvr %0" : "=r" ((usPVR)) : "0" ((usPVR)));
+
+	/*
+	 * Determine processor internal clock
+	 */
+	if(ucSystemType==SYS_TYPE_PPC4)
+	{
+		if(((ucBoardRevMaj==1) && (ucBoardRevMin==0)) ||
+		   ((ucSimmPresent&0x40)==0))
+		{
+			/*
+			 * Rev. 1A is always 66MHz
+			 */
+			ulCpuBusClock=66666667;
+		}
+		else
+		{
+			ulCpuBusClock=83333333;
+		}
+	}
+	else if((((usPVR>>16)==MPC603e) && (ucSystemType!=SYS_TYPE_PPC1)) ||
+	        ((usPVR>>16)==MPC603ev) ||
+	        ((usPVR>>16)==MPC604e))
+	{
+		ulCpuBusClock=ulBusSpeed[(ucEquipPres2&0x1c)>>2];
+	}
+	else
+	{
+		if(((ucSystemType>SYS_TYPE_PPC1) || (ucBoardRevMaj>=5)) &&
+		   (ucEquipPres1&0x08))
+		{
+			/*
+			 * 66 MHz bus clock for 005 if indicated
+			 */
+			ulCpuBusClock=66666667;
+		}
+		else
+		{
+			/*
+			 * 33 MHz bus clock for 004 always
+			 */
+			ulCpuBusClock=33333333;
+		}
+	}
+
+
+  /*
+   *  Allocate the memory for the RTEMS Work Space.  This can come from
+   *  a variety of places: hard coded address, malloc'ed from outside
+   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
+   *  typically done by stock BSPs) by subtracting the required amount
+   *  of work space from the last physical address on the CPU board.
+   */
+
+  work_space_start = 
+    (unsigned char *)ulMemorySize - BSP_Configuration.work_space_size;
+
+  if ( work_space_start <= (unsigned char *)&end ) {
+    DEBUG_puts( "bspstart: Not enough RAM!!!\n" );
+    bsp_cleanup();
+  }
+
+  BSP_Configuration.work_space_start = work_space_start;
+
+  /*
+   * Add 1 region for RTEMS Malloc
+   */
+
+  BSP_Configuration.RTEMS_api_configuration->maximum_regions++;
+
+  /*
+   *  Account for the console's resources
+   */
+
+  console_reserve_resources( &BSP_Configuration );
+
+  /*
+   *  initialize the CPU table for this BSP
+   */
+
+  Cpu_table.exceptions_in_RAM = TRUE;
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;    /* init libc, etc. */
+  Cpu_table.predriver_hook = bsp_predriver_hook; 
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+  Cpu_table.do_zero_of_workspace = TRUE;
+  Cpu_table.interrupt_stack_size = (32 * 1024);
+  Cpu_table.clicks_per_usec = ulCpuBusClock/4000000;
+
+
+}
+
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bsptrap.S b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bsptrap.S
new file mode 100644
index 0000000000..3c6a4c16d4
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bsptrap.S
@@ -0,0 +1,25 @@
+/*
+ * (c) 1998, Radstone Technology plc.
+ *
+ *
+ * This is an unpublished work the copyright  in  which   vests
+ * in  Radstone Technology plc.  All rights reserved.
+ *
+ * The information contained herein is the property of Radstone
+ * Technology  plc.  and  is  supplied  without  liability  for
+ * errors or omissions and no part may be reproduced,  used  or
+ * disclosed except as authorized by contract or  other written
+ * permission.     The    copyright    and    the     foregoing
+ * restriction   on  reproduction, use and disclosure extend to
+ * all  the   media   in   which   this  information   may   be
+ * embodied.
+ *
+ */
+#include <rtems/score/targopts.h>
+#include "ppc-asm.h"
+
+	.file	"bsptrap.s"
+	.text
+FUNC_START(bsp_trap)
+	sc
+FUNC_END(bsp_trap)
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c
new file mode 100644
index 0000000000..d4b8f46274
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c
@@ -0,0 +1,355 @@
+/*
+ *  COPYRIGHT (c) 1998 by Radstone Technology
+ *
+ *
+ * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
+ * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
+ * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
+ *
+ * You are hereby granted permission to use, copy, modify, and distribute
+ * this file, provided that this notice, plus the above copyright notice
+ * and disclaimer, appears in all copies. Radstone Technology will provide
+ * no support for this code.
+ *
+ */
+/*  genpvec.c
+ *
+ *  These routines handle the external exception.  Multiple ISRs occur off
+ *  of this one interrupt.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id: 
+ */
+
+#include <bsp.h>
+#include "chain.h"
+#include <assert.h>
+
+/* 
+ * Proto types for this file                                          
+ */
+
+rtems_isr external_exception_ISR (
+  rtems_vector_number   vector                                  /* IN  */
+);
+
+#define   NUM_LIRQ_HANDLERS   20
+#define   NUM_LIRQ            ( MAX_BOARD_IRQS - PPC_IRQ_LAST )
+
+/*
+ * Current 8259 masks
+ */
+unsigned8	ucMaster8259Mask;
+unsigned8	ucSlave8259Mask;
+
+/* 
+ * Structure to for one of possible multiple interrupt handlers for 
+ * a given interrupt.
+ */
+typedef struct
+{
+  Chain_Node          Node;
+  rtems_isr_entry     handler;                  /* isr routine        */
+  rtems_vector_number vector;                   /* vector number      */
+} EE_ISR_Type;
+
+
+/* Note:  The following will not work if we add a method to remove
+ *        handlers at a later time.
+ */
+  EE_ISR_Type       ISR_Nodes [NUM_LIRQ_HANDLERS];
+  rtems_unsigned16  Nodes_Used; 
+  Chain_Control     ISR_Array  [NUM_LIRQ];
+
+void initialize_external_exception_vector()
+{
+	rtems_isr_entry previous_isr;
+	rtems_status_code status;
+	int i;
+
+	Nodes_Used = 0;
+
+	for (i=0; i <NUM_LIRQ; i++)
+	{
+		Chain_Initialize_empty( &ISR_Array[i] );
+	}
+
+	/*
+	 * Initialise the 8259s
+	 */
+	outport_byte(ISA8259_M_CTRL, 0x11); /* ICW1 */
+	outport_byte(ISA8259_S_CTRL, 0x11); /* ICW1 */
+	outport_byte(ISA8259_M_MASK, 0x00); /* ICW2 vectors 0-7 */
+	outport_byte(ISA8259_S_MASK, 0x08); /* ICW2 vectors 8-15 */
+	outport_byte(ISA8259_M_MASK, 0x04); /* ICW3 cascade on IRQ2 */
+	outport_byte(ISA8259_S_MASK, 0x02); /* ICW3 cascade on IRQ2 */
+	outport_byte(ISA8259_M_MASK, 0x01); /* ICW4 x86 normal EOI */
+	outport_byte(ISA8259_S_MASK, 0x01); /* ICW4 x86 normal EOI */
+
+	/*
+	 * Enable IRQ2 cascade and disable all other interrupts
+	 */
+	ucMaster8259Mask=0xfb;
+	ucSlave8259Mask=0xff;
+
+	outport_byte(ISA8259_M_MASK, ucMaster8259Mask);
+	outport_byte(ISA8259_S_MASK, ucSlave8259Mask);
+
+	/*
+	 * Set up edge/level
+	 */
+	switch(ucSystemType)
+	{
+		case SYS_TYPE_PPC1:
+		{
+			if(ucBoardRevMaj<5)
+			{
+				outport_byte(ISA8259_S_ELCR,
+					     ELCRS_INT15_LVL);
+			}
+			else
+			{
+				outport_byte(ISA8259_S_ELCR,
+					     ELCRS_INT9_LVL |
+					     ELCRS_INT11_LVL |
+					     ELCRS_INT14_LVL |
+					     ELCRS_INT15_LVL);
+			}
+			outport_byte(ISA8259_M_ELCR,
+				     ELCRM_INT5_LVL |
+				     ELCRM_INT7_LVL);
+			break;
+		}
+
+		case SYS_TYPE_PPC1a:
+		{
+			outport_byte(ISA8259_S_ELCR,
+				     ELCRS_INT9_LVL |
+				     ELCRS_INT11_LVL |
+				     ELCRS_INT14_LVL |
+				     ELCRS_INT15_LVL);
+			outport_byte(ISA8259_M_ELCR,
+				     ELCRM_INT5_LVL);
+			break;
+		}
+		
+		case SYS_TYPE_PPC2:
+		case SYS_TYPE_PPC2a:
+		case SYS_TYPE_PPC4:
+		default:
+		{
+			outport_byte(ISA8259_S_ELCR,
+				     ELCRS_INT9_LVL |
+				     ELCRS_INT10_LVL |
+				     ELCRS_INT11_LVL |
+				     ELCRS_INT14_LVL |
+				     ELCRS_INT15_LVL);
+			outport_byte(ISA8259_M_ELCR,
+				     ELCRM_INT5_LVL |
+				     ELCRM_INT7_LVL);
+			break;
+		}
+	}
+
+	/*  
+	 * Install external_exception_ISR () as the handler for 
+	 *  the General Purpose Interrupt.
+	 */
+
+	status = rtems_interrupt_catch( external_exception_ISR, 
+					PPC_IRQ_EXTERNAL,
+					(rtems_isr_entry *) &previous_isr );
+}
+
+/*
+ *  This routine installs one of multiple ISRs for the general purpose 
+ *  inerrupt.
+ */
+void set_EE_vector(
+  rtems_isr_entry     handler,      /* isr routine        */
+  rtems_vector_number vector        /* vector number      */
+)
+{
+	rtems_unsigned16 vec_idx  = vector - PPCN_60X_8259_IRQ_BASE;
+	rtems_unsigned32 index;
+
+	assert  (Nodes_Used < NUM_LIRQ_HANDLERS);
+
+	/*
+	 *  If we have already installed this handler for this vector, then
+	 *  just reset it.
+	 */
+
+	for ( index=0 ; index < Nodes_Used ; index++ )
+	{
+		if(ISR_Nodes[index].vector == vector &&
+		   ISR_Nodes[index].handler == handler)
+		{
+			return;
+		}
+	}
+
+	/*
+	 *  Doing things in this order makes them more atomic
+	 */
+
+	Nodes_Used++; 
+
+	index = Nodes_Used - 1;
+
+	ISR_Nodes[index].handler = handler;
+	ISR_Nodes[index].vector  = vector;
+
+	Chain_Append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node );
+
+	/*
+	 * Enable the interrupt
+	 */
+	En_Ext_Interrupt(vector);
+}
+
+/* 
+ * This interrupt service routine is called for an External Exception.
+ */
+rtems_isr external_exception_ISR (
+  rtems_vector_number   vector             /* IN  */
+)
+{ 
+	unsigned16	index;
+	unsigned8	ucISr;
+	EE_ISR_Type	*node;
+
+	index = *((volatile unsigned8 *)IRQ_VECTOR_BASE);
+
+	/*
+	 * check for spurious interrupt
+	 */
+	if(index==7)
+	{
+		/*
+		 * OCW3 select IS register
+		 */
+		outport_byte(ISA8259_M_CTRL, 0x0b);
+		/*
+		 * Read IS register
+		 */
+		inport_byte(ISA8259_M_CTRL, ucISr);
+		if(!(ucISr & 0x80))
+		{
+			/*
+			 * Spurious interrupt
+			 */
+			return;
+		}
+	}
+
+	node=(EE_ISR_Type *)ISR_Array[index].first;
+	while(!_Chain_Is_tail(&ISR_Array[index], (Chain_Node *)node))
+	{
+		(*node->handler)( node->vector );
+		node = (EE_ISR_Type *)node->Node.next;
+	}
+
+	/*
+	 * Dismiss the interrupt
+	 */
+	if(index&8)
+	{
+		/*
+		 * Dismiss the interrupt in Slave first as it
+		 * is cascaded
+		 */
+		outport_byte(ISA8259_S_CTRL, NONSPECIFIC_EOI);
+	}
+
+	/*
+	 * Dismiss the interrupt in Master
+	 */
+	outport_byte(ISA8259_M_CTRL, NONSPECIFIC_EOI);
+}
+
+void Dis_Ext_Interrupt(int level)
+{
+	ISR_Level Irql;
+
+	level-=PPCN_60X_8259_IRQ_BASE;
+
+	if(level==2)
+	{
+		/*
+		 * Level 2 is for cascade and must not be fiddled with
+		 */
+		return;
+	}
+
+	/*
+	 * Ensure that accesses to the mask are indivisible
+	 */
+	_ISR_Disable(Irql);
+
+	if(level<8)
+	{
+		/*
+		 * Interrupt is handled by Master
+		 */
+		ucMaster8259Mask|=1<<level;
+		outport_byte(ISA8259_M_MASK, ucMaster8259Mask);
+	}
+	else
+	{
+		/*
+		 * Interrupt is handled by Slave
+		 */
+		ucSlave8259Mask|=1<<(level-8);
+		outport_byte(ISA8259_S_MASK, ucSlave8259Mask);
+	}
+	_ISR_Enable(Irql);
+}
+
+void En_Ext_Interrupt(int level)
+{
+	ISR_Level Irql;
+
+	level-=PPCN_60X_8259_IRQ_BASE;
+
+	if(level==2)
+	{
+		/*
+		 * Level 2 is for cascade and must not be fiddled with
+		 */
+		return;
+	}
+
+	/*
+	 * Ensure that accesses to the mask are indivisible
+	 */
+	_ISR_Disable(Irql);
+
+	if(level<8)
+	{
+		/*
+		 * Interrupt is handled by Master
+		 */
+		ucMaster8259Mask&=~(1<<level);
+		outport_byte(ISA8259_M_MASK, ucMaster8259Mask);
+	}
+	else
+	{
+		/*
+		 * Interrupt is handled by Slave
+		 */
+		ucSlave8259Mask&=~(1<<(level-8));
+		outport_byte(ISA8259_S_MASK, ucSlave8259Mask);
+	}
+
+	_ISR_Enable(Irql);
+}
+
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/linkcmds b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/linkcmds
new file mode 100644
index 0000000000..7f4f3cf330
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/linkcmds
@@ -0,0 +1,173 @@
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+	      "elf32-powerpc")
+
+OUTPUT_ARCH(powerpc)
+ENTRY(_start)
+
+/*
+ *  Number of Decrementer countdowns per millisecond
+ *
+ *  Calculated by:  (66.67 Mhz * 1000) / 4 cycles per click
+ */
+
+SECTIONS
+{
+  .vectors 0x00100 :
+  {
+    *(.vectors)
+  }
+
+  /* Read-only sections, merged into text segment: */
+  /* SDS ROM worked at 0x30000                     */
+  . = 0x30000;
+  .interp   : { *(.interp) }
+  .hash		  : { *(.hash)		}
+  .dynsym	  : { *(.dynsym)		}
+  .dynstr	  : { *(.dynstr)		}
+  .rela.text	  : { *(.rela.text) 	}
+  .rela.data	  : { *(.rela.data) 	}
+  .rela.rodata	  : { *(.rela.rodata) 	}
+  .rela.got	  : { *(.rela.got)	}
+  .rela.got1	  : { *(.rela.got1)	}
+  .rela.got2	  : { *(.rela.got2)	}
+  .rela.ctors	  : { *(.rela.ctors)	}
+  .rela.dtors	  : { *(.rela.dtors)	}
+  .rela.init	  : { *(.rela.init)	}
+  .rela.fini	  : { *(.rela.fini)	}
+  .rela.bss	  : { *(.rela.bss)	}
+  .rela.plt	  : { *(.rela.plt)	}
+  .rela.sdata	  : { *(.rela.sdata2)	}
+  .rela.sbss	  : { *(.rela.sbss2)	}
+  .rela.sdata2	  : { *(.rela.sdata2)	}
+  .rela.sbss2	  : { *(.rela.sbss2)	}
+  .plt   : { *(.plt) }
+  .text      :
+  {
+    *(.text)
+    *(.descriptors)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+  } =0
+  .init		  : { *(.init)		} =0
+  .fini		  : { *(.fini)		} =0
+  .rodata	  : { *(.rodata)  }
+  .rodata1	  : { *(.rodata1) }
+  _etext = .;
+  PROVIDE (etext = .);
+  PROVIDE (__SDATA2_START__ = .);
+  .sdata2   : { *(.sdata2) }
+  PROVIDE (__SBSS2_START__ = .);
+  .sbss2   : { *(.sbss2) }
+  PROVIDE (__SBSS2_END__ = .);
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  It would
+     be more correct to do this:
+       . = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
+     The current expression does not correctly handle the case of a
+     text segment ending precisely at the end of a page; it causes the
+     data segment to skip a page.  The above expression does not have
+     this problem, but it will currently (2/95) cause BFD to allocate
+     a single segment, combining both text and data, for this case.
+     This will prevent the text segment from being shared among
+     multiple executions of the program; I think that is more
+     important than losing a page of the virtual address space (note
+     that no actual memory is lost; the page which is skipped can not
+     be referenced).  */
+  . =  ALIGN(8) + 0x40000;
+  PROVIDE (sdata = .);
+  .data    :
+  {
+    *(.data)
+    CONSTRUCTORS
+  }
+  PROVIDE (__EXCEPT_START__ = .);
+  .gcc_except_table   : { *(.gcc_except_table) }
+  PROVIDE (__EXCEPT_END__ = .);
+
+  .data1   : { *(.data1) }
+  .got1		  : { *(.got1) }
+  .dynamic	  : { *(.dynamic) }
+  /* Put .ctors and .dtors next to the .got2 section, so that the pointers
+     get relocated with -mrelocatable. Also put in the .fixup pointers.
+     The current compiler no longer needs this, but keep it around for 2.7.2  */
+		PROVIDE (_GOT2_START_ = .);
+  .got2		  :  { *(.got2) }
+		PROVIDE (__GOT2_END__ = .);
+		PROVIDE (__CTOR_LIST__ = .);
+  .ctors	  : { *(.ctors) }
+		PROVIDE (__CTOR_END__ = .);
+		PROVIDE (__DTOR_LIST__ = .);
+  .dtors	  : { *(.dtors) }
+		PROVIDE (__DTOR_END__ = .);
+		PROVIDE (_FIXUP_START_ = .);
+  .fixup	  : { *(.fixup) }
+		PROVIDE (_FIXUP_END_ = .);
+		PROVIDE (__FIXUP_END__ = .);
+		PROVIDE (_GOT2_END_ = .);
+		PROVIDE (_GOT_START_ = .);
+  s.got = .;
+  .got		  : { *(.got) }
+  .got.plt	  : { *(.got.plt) }
+		PROVIDE (_GOT_END_ = .);
+		PROVIDE (__GOT_END__ = .);
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  PROVIDE (__SDATA_START__ = .);
+  .sdata	  : { *(.sdata) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  . =  ALIGN(8) + 0x1000;
+  PROVIDE (__SBSS_START__ = .);
+  .sbss      :
+  {
+    PROVIDE (__sbss_start = .);
+    *(.sbss)
+    *(.scommon)
+    PROVIDE (__sbss_end = .);
+  }
+  PROVIDE (__SBSS_END__ = .);
+  .bss       :
+  {
+   PROVIDE (__bss_start = .);
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   PROVIDE (__bss_end = .);
+  }
+  . =  ALIGN(8) + 0x8000;
+  PROVIDE (__stack = .);
+  _end = . ;
+  PROVIDE (end = .);
+
+  /* These are needed for ELF backends which have not yet been
+     converted to the new style linker.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  /* These must appear regardless of  .  */
+}
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/rtems-ctor.cc b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/rtems-ctor.cc
new file mode 100644
index 0000000000..1949e71f0c
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/rtems-ctor.cc
@@ -0,0 +1,124 @@
+/*
+ *  rtems-ctor.cc
+ *
+ *  Description:
+ *	This file exists solely to (try to) ensure RTEMS is initialized
+ *      before any global constructors are run.
+ *
+ *  The problem:
+ *      Global constructors might reasonably expect that new() will
+ *      work, but since new() uses malloc() which uses RTEMS regions,
+ *      it can not be called until after initialize_executive().
+ *
+ *      Global constructors are called in GNU systems one of 2 ways:
+ *
+ *              an "invisible" call to __main() inserted by compiler
+ *              This __main() calls __do_global_ctors() which
+ *              walks thru the table and calls all global
+ *              constructors.
+ *
+ *       or -
+ *              A special section is put into the linked binary.  The
+ *              system startup code knows to run the constructors in
+ *              this special section before calling main().
+ *
+ *      By making RTEMS initialization a constructor, we avoid having
+ *      too much about all this.  All we have to guarantee is that
+ *      this constructor is the first one run.
+ *
+ *
+ *  So for the first case above, this is what happens
+ *
+ *    host crt0
+ *      main()
+ *          __main()
+ *              __do_global_ctors()
+ *                  bsp_start()
+ *                      init_executive_early()
+ *                  <<any other constructors>>
+ *
+ *          rtems_init_executive_late()
+ *          bsp_cleanup()
+ *
+ *  TODO:
+ *
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id: 
+ */
+
+#include <bsp.h>
+
+/*
+ * RTEMS program name
+ * Probably not used by anyone, but it is nice to have it.
+ * Actually the UNIX version of CPU_INVOKE_DEBUGGER will probably
+ * need to use it
+ */
+
+char *rtems_progname;
+char **rtems_environp;
+
+#ifdef USE_CONSTRUCTORS_FOR_INIT_EXEC
+
+class RTEMS {
+    public:
+	RTEMS();
+        ~RTEMS();
+};
+
+RTEMS  rtems_constructor;
+
+RTEMS::RTEMS()
+{
+    bsp_start();
+}
+
+RTEMS::~RTEMS()
+{
+    bsp_cleanup();
+}
+#endif
+
+extern "C" {
+    int
+    main(int argc,
+         char **argv,
+         char **environp)
+    {
+
+#ifndef USE_CONSTRUCTORS_FOR_INIT_EXEC
+        bsp_start();
+#endif
+
+        if ((argc > 0) && argv && argv[0])
+            rtems_progname = argv[0];
+        else
+            rtems_progname = "RTEMS";
+
+        rtems_environp = environp;
+
+        /*
+         *  Start multitasking
+         */
+        rtems_initialize_executive_late( bsp_isr_level );
+
+#ifndef USE_CONSTRUCTORS_FOR_INIT_EXEC
+        bsp_cleanup();
+#endif
+
+        /*
+         * Returns when multitasking is stopped
+         * This allows our destructors to get run normally
+         */
+
+        return 0;
+    }
+}
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c
new file mode 100644
index 0000000000..dd7c39da82
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c
@@ -0,0 +1,55 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the target Board/CPU.
+ *  This routine is allowed to be as board dependent as necessary.
+ *
+ *  INPUT:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id: 
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+
+/*
+ *  This routine installs vector number vector. 
+ *  
+ */
+rtems_isr_entry set_vector(                    /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+)
+{
+  rtems_isr_entry previous_isr;
+  rtems_status_code status;
+
+  /* 
+   * vectors greater than PPC_IRQ_LAST are handled by the General purpose
+   * interupt handler. (8259)
+   */
+  if ( vector > PPC_IRQ_LAST )  {
+    set_EE_vector ( handler, vector );
+  }
+  else  {
+    status = rtems_interrupt_catch
+           ( handler, vector, (rtems_isr_entry *) &previous_isr );
+  }
+  return previous_isr;
+}
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c
new file mode 100644
index 0000000000..af18752c71
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c
@@ -0,0 +1,202 @@
+/*
+ *  PPCn_60x Spurious Trap Handler
+ *
+ *  This is just enough of a trap handler to let us know what 
+ *  the likely source of the trap was.
+ *
+ *  Based upon the SPARC ERC32 version which was developed as
+ *  part of the port of RTEMS to the ERC32 implementation 
+ *  of the SPARC by On-Line Applications Research Corporation (OAR) 
+ *  under contract to the European Space Agency (ESA).
+ *
+ *  COPYRIGHT (c) 1995. European Space Agency.
+ *
+ *  This terms of the RTEMS license apply to this file.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+
+#include <string.h>
+
+static const char digits[16] = "0123456789abcdef";
+
+rtems_isr bsp_stub_handler(
+   rtems_vector_number trap
+)
+{
+}
+
+/*
+ *  bsp_spurious_handler
+ *
+ *  Print a message on the debug console and then die
+ */
+rtems_isr bsp_spurious_handler(
+   rtems_vector_number trap
+)
+{
+
+
+
+  DEBUG_puts( "Spurious Trap" );
+  
+  switch ( trap ) {
+    case PPC_IRQ_SYSTEM_RESET:
+      DEBUG_puts( "System reset" );
+      break;
+    case PPC_IRQ_MCHECK:
+      DEBUG_puts( "Machine check" );
+      break;
+    case PPC_IRQ_PROTECT:
+      DEBUG_puts( "DSI" );
+      break;
+    case PPC_IRQ_ISI:
+      DEBUG_puts( "ISI" );
+      break;
+    case PPC_IRQ_EXTERNAL:
+      DEBUG_puts( "External interupt" );
+      break;
+    case PPC_IRQ_ALIGNMENT:
+      DEBUG_puts( "Alignment Exception" );
+      break;
+    case PPC_IRQ_PROGRAM:
+      DEBUG_puts( "Program" );
+      break;
+    case PPC_IRQ_NOFP:
+      DEBUG_puts( "Floating point unavailable" );
+      break;
+    case PPC_IRQ_DECREMENTER:
+      DEBUG_puts( "Decrementer" );
+      break;
+    case PPC_IRQ_RESERVED_A:
+      DEBUG_puts( "Reserved 0x00a00" );
+      break;
+    case PPC_IRQ_RESERVED_B:
+      DEBUG_puts( "Reserved 0x00b00" );
+      break;
+    case PPC_IRQ_SCALL:
+      DEBUG_puts( "System call" );
+      break;
+    case PPC_IRQ_TRACE:
+      DEBUG_puts( "Trace" );
+      break;
+    case PPC_IRQ_FP_ASST:
+      DEBUG_puts( "Floating point Assist" );
+      break;
+
+#if defined(ppc403)
+#error "Please fill in names. "                                  
+    case PPC_IRQ_CRIT :
+      DEBUG_puts( "Critical Error ");     
+      break;
+    case PPC_IRQ_PIT:
+      DEBUG_puts( "0x01000" );
+      break;
+    case PPC_IRQ_FIT:
+      DEBUG_puts( "0x01010" );
+      break;
+    case PPC_IRQ_WATCHDOG :
+      DEBUG_puts( "0x01020" );
+      break;
+    case PPC_IRQ_DEBUG	 :
+      DEBUG_puts( "0x02000" );
+      break;
+
+#elif defined(ppc601)
+#error "Please fill in names. "                                  
+    case PPC_IRQ_TRACE    :
+      DEBUG_puts( "0x02000" );
+      break;
+
+#elif defined(ppc603)
+#error "Please fill in names. "                                  
+    case PPC_IRQ_TRANS_MISS :
+      DEBUG_puts( "0x1000" );
+      break;
+    case PPC_IRQ_DATA_LOAD:
+      DEBUG_puts( "0x1100" );
+      break;
+    case PPC_IRQ_DATA_STORE:
+      DEBUG_puts( "0x1200" );
+      break;
+    case PPC_IRQ_ADDR_BRK:
+      DEBUG_puts( "0x1300" );
+      break;
+    case PPC_IRQ_SYS_MGT:
+      DEBUG_puts( "0x1400" );
+      break;
+
+#elif defined(ppc603e)
+    case PPC_TLB_INST_MISS:
+      DEBUG_puts( "Instruction Translation Miss" );
+      break;
+    case PPC_TLB_LOAD_MISS:
+      DEBUG_puts( "Data Load Translation Miss" );
+      break;
+    case PPC_TLB_STORE_MISS :
+      DEBUG_puts( "Data store Translation Miss");
+      break;
+    case PPC_IRQ_ADDRBRK:
+      DEBUG_puts( "Instruction address break point" );
+      break;
+    case PPC_IRQ_SYS_MGT:
+      DEBUG_puts( "System management interrupt" );
+      break;
+
+#elif defined(ppc604)
+#error "Please fill in names. "                                  
+    case PPC_IRQ_ADDR_BRK:
+      DEBUG_puts( "0x1300" );
+      break;
+    case PPC_IRQ_SYS_MGT:
+      DEBUG_puts( "0x1400" );
+      break;
+#endif
+
+  default:
+     DEBUG_puts( "Undefined exception " );
+     break;
+  }
+
+  /*
+   *  What else can we do but stop ...
+   */
+  /*
+   asm volatile( "" );
+   */
+}
+
+/*
+ *  bsp_spurious_initialize
+ *
+ *  Install the spurious handler for most traps.
+ */
+
+void bsp_spurious_initialize()
+{
+  rtems_unsigned32 trap;
+
+  for ( trap=0 ; trap < PPC_IRQ_LAST ; trap++ ) {
+
+    /*
+     *  Skip window overflow, underflow, and flush as well as software
+     *  trap 0 which we will use as a shutdown.
+     */
+
+    set_vector( bsp_spurious_handler, trap,  1 ); 
+  }
+
+  set_vector( bsp_stub_handler, PPC_IRQ_DECREMENTER, 1 );
+  set_vector( bsp_stub_handler, PPC_IRQ_TRACE, 1 );
+  set_vector( bsp_stub_handler, PPC_IRQ_SYS_MGT, 1 );
+}
+
+
+
+
+
+
+
+
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c
new file mode 100644
index 0000000000..58b3e13dbb
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c
@@ -0,0 +1,64 @@
+/*
+ *  COPYRIGHT (c) 1998 by Radstone Technology
+ *
+ *
+ * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
+ * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
+ * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
+ *
+ * You are hereby granted permission to use, copy, modify, and distribute
+ * this file, provided that this notice, plus the above copyright notice
+ * and disclaimer, appears in all copies. Radstone Technology will provide
+ * no support for this code.
+ *
+ */
+
+#include <rtems.h>
+
+/*
+ *  JRS - February 20, 1998
+ *
+ *  There is a swap32 in each port.  So this should be removed.
+ *
+ *  Adding a swap16 to the port would be useful.
+ *
+ *  The end of all this would be to remove this file.
+ */
+
+inline unsigned int Swap32(
+        unsigned32 ulValue
+)
+{
+        unsigned32 ulSwapped;
+
+        asm volatile(
+		"rlwimi %0,%1,8,24,31;"
+		"rlwimi %0,%1,24,16,23;"
+		"rlwimi %0,%1,8,8,15;"
+		"rlwimi %0,%1,24,0,7;" :
+		
+		"=&r" ((ulSwapped)) :
+		"r" ((ulValue))
+	);
+
+        return( ulSwapped );
+}
+
+inline unsigned int Swap16(
+        unsigned16 usValue
+)
+{
+        unsigned16 usSwapped;
+
+        asm volatile(
+		"rlwimi %0,%1,24,24,31;"
+		"rlwimi %0,%1,8,16,23;" :
+
+		"=&r" ((usSwapped)) :
+		"r" ((usValue))
+	);
+
+        return( usSwapped );
+}
+