diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-02-18 16:48:14 +0000 |
---|---|---|
committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-02-18 16:48:14 +0000 |
commit | 0c04c377bc8ac177d28bd0e0096d7c6940d33cd4 (patch) | |
tree | ba3062eb819e89de2eee14397ffe61b202ad10de /c/src/lib/libbsp/powerpc/ppcn_60x/start | |
parent | ./clock/Makefile.in,v (diff) | |
download | rtems-0c04c377bc8ac177d28bd0e0096d7c6940d33cd4.tar.bz2 |
./clock/Makefile.in,v
./clock/clock.c,v
./console/Makefile.in,v
./console/config.c,v
./console/console.c,v
./console/console.h,v
./console/debugio.c,v
./console/i8042.c,v
./console/i8042_p.h,v
./console/i8042vga.c,v
./console/i8042vga.h,v
./console/ns16550.c,v
./console/ns16550.h,v
./console/ns16550_p.h,v
./console/ns16550cfg.c,v
./console/ns16550cfg.h,v
./console/vga.c,v
./console/vga_p.h,v
./console/z85c30.c,v
./console/z85c30.h,v
./console/z85c30_p.h,v
./console/z85c30cfg.c,v
./console/z85c30cfg.h,v
./include/Makefile.in,v
./include/bsp.h,v
./include/chain.h,v
./include/coverhd.h,v
./include/extisrdrv.h,v
./include/nvram.h,v
./include/pci.h,v
./include/tod.h,v
./network/Makefile.in,v
./network/amd79c970.c,v
./network/amd79c970.h,v
./nvram/Makefile.in,v
./nvram/ds1385.h,v
./nvram/mk48t18.h,v
./nvram/nvram.c,v
./nvram/prepnvr.h,v
./nvram/stk11c68.h,v
./pci/Makefile.in,v
./pci/pci.c,v
./start/Makefile.in,v
./start/start.s,v
./startup/Makefile.in,v
./startup/bspclean.c,v
./startup/bspstart.c,v
./startup/bsptrap.s,v
./startup/device-tree,v
./startup/genpvec.c,v
./startup/linkcmds,v
./startup/rtems-ctor.cc,v
./startup/sbrk.c,v
./startup/setvec.c,v
./startup/spurious.c,v
./startup/swap.c,v
./timer/Makefile.in,v
./timer/timer.c,v
./tod/Makefile.in,v
./tod/cmos.h,v
./tod/tod.c,v
./universe/Makefile.in,v
./universe/universe.c,v
./vectors/Makefile.in,v
./vectors/README,v
./vectors/align_h.s,v
./vectors/vectors.s,v
./wrapup/Makefile.in,v
./Makefile.in,v
./README,v
./STATUS,v
./bsp_specs,v
Diffstat (limited to 'c/src/lib/libbsp/powerpc/ppcn_60x/start')
-rw-r--r-- | c/src/lib/libbsp/powerpc/ppcn_60x/start/Makefile.in | 54 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S | 153 |
2 files changed, 207 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/start/Makefile.in b/c/src/lib/libbsp/powerpc/ppcn_60x/start/Makefile.in new file mode 100644 index 0000000000..3e7884433a --- /dev/null +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/start/Makefile.in @@ -0,0 +1,54 @@ +# +# $Id$ +# + +@SET_MAKE@ +srcdir = @srcdir@ +VPATH = @srcdir@ +RTEMS_ROOT = @top_srcdir@ +PROJECT_ROOT = @PROJECT_ROOT@ + +PGM=${ARCH}/start.o + +# C source names, if any, go here -- minus the .c +C_PIECES= +C_FILES=$(C_PIECES:%=%.c) +C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) + +H_FILES= + +# Assembly source names, if any, go here -- minus the .S +S_PIECES=start +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) + +SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) +OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) + +include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg +include $(RTEMS_ROOT)/make/leaf.cfg + +# +# (OPTIONAL) Add local stuff here using += +# + +DEFINES += +CPPFLAGS += +CFLAGS += + +LD_PATHS += +LD_LIBS += +LDFLAGS += + +# +# Add your list of files to delete here. The config files +# already know how to delete some stuff, so you may want +# to just run 'make clean' first to see what gets missed. +# 'make clobber' already includes 'make clean' +# + +CLEAN_ADDITIONS += +CLOBBER_ADDITIONS += + +all: ${ARCH} $(SRCS) $(OBJS) $(PGM) + $(INSTALL_VARIANT) -m 555 ${PGM} ${PROJECT_RELEASE}/lib diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S b/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S new file mode 100644 index 0000000000..a8dc4cb3b0 --- /dev/null +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S @@ -0,0 +1,153 @@ +/* + * This is based on the mvme-crt0.S file from libgloss/rs6000. + * crt0.S -- startup file for PowerPC systems. + * + * (c) 1998, Radstone Technology plc. + * + * + * This is an unpublished work the copyright in which vests + * in Radstone Technology plc. All rights reserved. + * + * The information contained herein is the property of Radstone + * Technology plc. and is supplied without liability for + * errors or omissions and no part may be reproduced, used or + * disclosed except as authorized by contract or other written + * permission. The copyright and the foregoing + * restriction on reproduction, use and disclosure extend to + * all the media in which this information may be + * embodied. + * + * Copyright (c) 1995 Cygnus Support + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + * + * $Id$ + */ +#include <rtems/score/targopts.h> +#include "ppc-asm.h" +#include "bsp.h" + + .file "start.s" + + .extern FUNC_NAME(atexit) + .globl FUNC_NAME(__atexit) + .section ".sdata","aw" + .align 2 +FUNC_NAME(__atexit): /* tell C's eabi-ctor's we have an atexit function */ + .long FUNC_NAME(atexit)@fixup /* and that it is to register __do_global_dtors */ + + .section ".fixup","aw" + .align 2 + .long FUNC_NAME(__atexit) + + .text + .globl _start + .type _start,@function +_start: + /* Set MSR */ + /* + * Enable data and instruction address translation and floating point + */ + li r3,MSR_IR | MSR_DR | MSR_FP + mtmsr r3 + + /* + * The caches are already flushed by the firmware so just enable + */ + mfspr r3,HID0 +#if PPC_USE_DATA_CACHE + /* + * Enable data and instruction cache + */ + ori r3,r3 ,H0_60X_ICE | H0_60X_DCE +#else + /* + * Enable instruction cache only + */ + ori r3,r3 ,H0_60X_ICE +#endif + mtspr HID0,r3 + + /* clear bss */ + lis r6,__bss_start@h + ori r6,r6,__bss_start@l + lis r7,__bss_end@h + ori r7,r7,__bss_end@l + + cmplw 1,r6,r7 + bc 4,4,.Lbss_done + + subf r8,r6,r7 /* number of bytes to zero */ + srwi r9,r8,2 /* number of words to zero */ + mtctr r9 + li r0,0 /* zero to clear memory */ + addi r6,r6,-4 /* adjust so we can use stwu */ +.Lbss_loop: + stwu r0,4(r6) /* zero bss */ + bdnz .Lbss_loop + +.Lbss_done: + + /* clear sbss */ + lis r6,__sbss_start@h + ori r6,r6,__sbss_start@l + lis r7,__sbss_end@h + ori r7,r7,__sbss_end@l + + cmplw 1,r6,r7 + bc 4,4,.Lsbss_done + + subf r8,r6,r7 /* number of bytes to zero */ + srwi r9,r8,2 /* number of words to zero */ + mtctr r9 + li r0,0 /* zero to clear memory */ + addi r6,r6,-4 /* adjust so we can use stwu */ +.Lsbss_loop: + stwu r0,4(r6) /* zero sbss */ + bdnz .Lsbss_loop + +.Lsbss_done: + + lis sp,__stack@h + ori sp,sp,__stack@l + + /* set up initial stack frame */ + addi sp,sp,-4 /* make sure we don't overwrite debug mem */ + lis r0,0 + stw r0,0(sp) /* clear back chain */ + stwu sp,-56(sp) /* push another stack frame */ + + li r3, 0 /* argc */ + li r4, 0 /* argv */ + li r5, 0 /* environp */ + + /* Let her rip */ + bl FUNC_NAME(boot_card) + + /* + * This should never get reached + */ + /* + * Return MSR to its reset state + */ + li r3,0 + mtmsr r3 + isync + + /* + * Call reset entry point + */ + lis r3,0xfff0 + ori r3,r3,0x100 + mtlr r3 + blr +.Lstart: + .size _start,.Lstart-_start |