2005-04-28 Joel Sherrill <joel@OARcorp.com>

	* acinclude.m4: Remove dmv177 and ppcn_60x.
	* dmv177/.cvsignore, dmv177/ChangeLog, dmv177/Makefile.am,
	dmv177/QUIRKS, dmv177/README, dmv177/README.net, dmv177/STATUS,
	dmv177/bsp_specs, dmv177/cable.doc, dmv177/configure.ac,
	dmv177/times, dmv177/clock/clock.c, dmv177/console/conscfg.c,
	dmv177/console/debugio.c, dmv177/include/.cvsignore,
	dmv177/include/bsp.h, dmv177/include/dmv170.h, dmv177/include/tm27.h,
	dmv177/scv64/scv64.c, dmv177/sonic/dmvsonic.c, dmv177/start/start.S,
	dmv177/startup/bspclean.c, dmv177/startup/bspstart.c,
	dmv177/startup/genpvec.c, dmv177/startup/linkcmds,
	dmv177/startup/setvec.c, dmv177/startup/vmeintr.c,
	dmv177/timer/timer.c, dmv177/tod/todcfg.c, ppcn_60x/.cvsignore,
	ppcn_60x/ChangeLog, ppcn_60x/Makefile.am, ppcn_60x/README,
	ppcn_60x/STATUS, ppcn_60x/bsp_specs, ppcn_60x/configure.ac,
	ppcn_60x/clock/clock.c, ppcn_60x/console/config.c,
	ppcn_60x/console/console.c, ppcn_60x/console/console.h,
	ppcn_60x/console/debugio.c, ppcn_60x/console/i8042.c,
	ppcn_60x/console/i8042_p.h, ppcn_60x/console/i8042vga.c,
	ppcn_60x/console/i8042vga.h, ppcn_60x/console/ns16550cfg.c,
	ppcn_60x/console/ns16550cfg.h, ppcn_60x/console/vga.c,
	ppcn_60x/console/vga_p.h, ppcn_60x/console/z85c30cfg.c,
	ppcn_60x/console/z85c30cfg.h, ppcn_60x/include/.cvsignore,
	ppcn_60x/include/bsp.h, ppcn_60x/include/extisrdrv.h,
	ppcn_60x/include/nvram.h, ppcn_60x/include/pci.h,
	ppcn_60x/include/tm27.h, ppcn_60x/network/amd79c970.c,
	ppcn_60x/network/amd79c970.h, ppcn_60x/nvram/ds1385.h,
	ppcn_60x/nvram/mk48t18.h, ppcn_60x/nvram/nvram.c,
	ppcn_60x/nvram/prepnvr.h, ppcn_60x/nvram/stk11c68.h,
	ppcn_60x/pci/pci.c, ppcn_60x/start/start.S,
	ppcn_60x/startup/bspclean.c, ppcn_60x/startup/bspstart.c,
	ppcn_60x/startup/bsptrap.S, ppcn_60x/startup/genpvec.c,
	ppcn_60x/startup/linkcmds, ppcn_60x/startup/rtems-ctor.cc,
	ppcn_60x/startup/setvec.c, ppcn_60x/startup/spurious.c,
	ppcn_60x/startup/swap.c, ppcn_60x/timer/timer.c, ppcn_60x/tod/cmos.h,
	ppcn_60x/tod/tod.c, ppcn_60x/universe/universe.c,
	ppcn_60x/vectors/README, ppcn_60x/vectors/align_h.S,
	ppcn_60x/vectors/vectors.S: Removed.

1 files changed, 0 insertions, 87 deletions

diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h
deleted file mode 100644
index 10bfb872a5..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- *  COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- */
-
-/*
- * Definitions for the mk48t18 RTC/NvRAM
- */
-
-#ifndef _MK48T18_H
-#define _MK48T18_H
-
-#include "prepnvr.h"
-
-/*
- * This structure maps to the top of the NvRAM. It is based on the standard
- * CMOS.h file for the ds1385. Feature and system dependant areas are preserved
- * for potential compatibility issues.
- *
- * The CRC's are computed with x**16+x**12+x**5 + 1 polynomial
- * The clock is kept in 24 hour BCD mode and should be set to UT(GMT)
- */
-
-typedef struct _MK48T18_CMOS_MAP {
-    uint8_t   SystemDependentArea2[8];
-    uint8_t   FeatureByte0[1];
-    uint8_t   FeatureByte1[1];
-    uint8_t   Century;	     /* century byte in BCD */
-    uint8_t   FeatureByte3[1];
-    uint8_t   FeatureByte4[1];
-    uint8_t   FeatureByte5[1];
-    uint8_t   FeatureByte6[1];
-    uint8_t   FeatureByte7[1];
-    uint8_t   BootPW[14];
-    uint16_t         BootCrc; /* CRC on BootPW */
-    uint8_t   ConfigPW[14];
-    uint16_t         ConfigCrc; /* CRC on ConfigPW */
-    uint8_t   SystemDependentArea1[8];
-    /*
-     * The following are the RTC registers
-     */
-    volatile uint8_t   Control;
-    volatile uint8_t   Second:7;	/* 0-59 */
-    volatile uint8_t   Stop:1;
-    volatile uint8_t   Minute;	/* 0-59 */
-    volatile uint8_t   Hour;	/* 0-23 */
-    volatile uint8_t   Day:3;	/* 1-7 */
-    volatile uint8_t   Resvd1:3;	/* 0 */
-    volatile uint8_t   FT:1;	/* Frequency test bit - must be 0 */
-    volatile uint8_t   Resvd2:1;	/* 0 */
-    volatile uint8_t   Date;	/* 1-31 */
-    volatile uint8_t   Month;	/* 1-12 */
-    volatile uint8_t   Year;	/* 0-99 */
-} MK48T18_CMOS_MAP, *PMK48T18_CMOS_MAP;
-
-/*
- * Control register definitions
- */
-#define MK48T18_CTRL_WRITE	0x80
-#define MK48T18_CTRL_READ	0x40
-#define MK48T18_CTRL_SIGN	0x20
-
-#define MK48T18_NVSIZE 8192-sizeof(MK48T18_CMOS_MAP)
-#define MK48T18_GESIZE (MK48T18_NVSIZE-CONFSIZE-OSAREASIZE-sizeof(HEADER))
-#define MK48T18_BASE (PMK48T18_NVRAM_MAP)((uint8_t*)PCI_MEM_BASE+0x00800000)
-
-/* Here is the whole map of the MK48T18 NVRAM */
-typedef struct _MK48T18_NVRAM_MAP {
-    HEADER	Header;
-    uint8_t  	GEArea[MK48T18_GESIZE];
-    uint8_t  	OSArea[OSAREASIZE];
-    uint8_t  	ConfigArea[CONFSIZE];
-    MK48T18_CMOS_MAP	CMOS;
-} MK48T18_NVRAM_MAP, *PMK48T18_NVRAM_MAP;
-
-#endif /* _MK48T18_H */