2005-05-12 Jennifer Averett <jennifer.averett@oarcorp.com>

	* README.VME, include/bsp.h, irq/irq.h, network/GT64260eth.c,
	pci/detect_host_bridge.c, pci/gtpcireg.h, pci/pci.c, pci/pci.h,
	pci/pci_interface.c, pci/pcifinddevice.c:
	Submitted by Kate Feng <feng1@bnl.gov> as RTEMS-MVME5500 BSP v1.1 release.
	Modifications made to merge this release with the current tree.

1 files changed, 228 insertions, 156 deletions

diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
index 3afb214ea4..6d9f842426 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
@@ -11,15 +11,16 @@
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
+ *  http://www.rtems.com/rtems/license.html.
  *
- *  $Id$
+ *  pci.c,v 1.2 2002/05/14 17:10:16 joel Exp
  *
  *  Copyright 2004, Brookhaven National Laboratory and
  *                  Shuchen K. Feng, <feng1@bnl.gov>, 2004
  *   - modified and added support for MVME5500 board
  *   - added 2nd PCI support for the mvme5500/GT64260 PCI bridge
- *
+ *   - added bus support for the expansion of PMCSpan, thanks to 
+ *     Peter Dufault (dufault@hda.com) for inputs.
  */
 #define PCI_MAIN
 
@@ -34,18 +35,33 @@
 #include <string.h>
 
 #define PCI_DEBUG 0
-#define PCI_PRINT 1
+#define PCI_PRINT 0
+
+/* allow for overriding these definitions */
+#ifndef PCI_CONFIG_ADDR
+#define PCI_CONFIG_ADDR			0xcf8
+#endif
+#ifndef PCI_CONFIG_DATA
+#define PCI_CONFIG_DATA			0xcfc
+#endif
+
+#ifndef PCI1_CONFIG_ADDR
+#define PCI1_CONFIG_ADDR		0xc78
+#endif
+#ifndef PCI1_CONFIG_DATA
+#define PCI1_CONFIG_DATA	        0xc7c
+#endif
 
 #define PCI_INVALID_VENDORDEVICEID	0xffffffff
 #define PCI_MULTI_FUNCTION		0x80
 #define HOSTBRIDGET_ERROR               0xf0000000
 
-typedef unsigned char unchar;
-
-#define	MAX_NUM_PCI_DEVICES	20
+/* define a shortcut */
+#define pci	BSP_pci_configuration
 
+typedef unsigned char unchar;
 static int		  numPCIDevs=0;
-extern void PCI_interface(), pciAccessInit();
+extern void pci_interface();
 
 /* Pack RegNum,FuncNum,DevNum,BusNum,and ConfigEnable for
  * PCI Configuration Address Register
@@ -60,145 +76,196 @@ unchar ucMaxPCIBus=0;
 
 /* Please note that PCI0 and PCI1 does not correlate with the busNum 0 and 1.
  */
-int PCIx_read_config_byte(int npci, unchar bus, unchar dev,
-unchar func, unchar offset, unchar *val)
+static int direct_pci_read_config_byte(unchar bus,unchar dev,unchar func,
+unchar offset,unchar *val)
 {
+  volatile unsigned char *config_addr, *config_data;
+
+  if (bus>= BSP_MAX_PCI_BUS_ON_PCI0) {
+     bus-=BSP_MAX_PCI_BUS_ON_PCI0;
+     config_addr = (volatile unsigned char*) PCI1_CONFIG_ADDR;
+     config_data = (volatile unsigned char*) PCI1_CONFIG_DATA;
+  }
+  else {
+     config_addr = pci.pci_config_addr;
+     config_data = pci.pci_config_data;
+  }
   *val = 0xff;
   if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
-  outl(pciConfigPack(bus,dev,func,offset),BSP_pci_config[npci].pci_config_addr);
-  *val = inb(BSP_pci_config[npci].pci_config_data + (offset&3));
+#if 0
+  printk("addr %x, data %x, pack %x \n", config_addr,
+    config_data,pciConfigPack(bus,dev,func,offset));
+#endif
+  outl(pciConfigPack(bus,dev,func,offset),config_addr);
+  *val = inb(config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
 
-int PCIx_read_config_word(int npci, unchar bus, unchar dev,
+static int direct_pci_read_config_word(unchar bus, unchar dev,
 unchar func, unchar offset, unsigned short *val)
 {
+  volatile unsigned char *config_addr, *config_data;
+
+  if (bus>= BSP_MAX_PCI_BUS_ON_PCI0) {
+     bus-=BSP_MAX_PCI_BUS_ON_PCI0;
+     config_addr = (volatile unsigned char*) PCI1_CONFIG_ADDR;
+     config_data = (volatile unsigned char*) PCI1_CONFIG_DATA;
+  }
+  else {
+     config_addr = (volatile unsigned char*) pci.pci_config_addr;
+     config_data = (volatile unsigned char*) pci.pci_config_data;
+  }
+
   *val = 0xffff; 
   if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
-  outl(pciConfigPack(bus,dev,func,offset),BSP_pci_config[npci].pci_config_addr);
-  *val = inw(BSP_pci_config[npci].pci_config_data + (offset&2));
+#if 0
+  printk("addr %x, data %x, pack %x \n", config_addr,
+    config_data,pciConfigPack(bus,dev,func,offset));
+#endif
+  outl(pciConfigPack(bus,dev,func,offset),config_addr);
+  *val = inw(config_data + (offset&2));
   return PCIBIOS_SUCCESSFUL;
 }
 
-int PCIx_read_config_dword(int npci, unchar bus, unchar dev,
+static int direct_pci_read_config_dword(unchar bus, unchar dev,
 unchar func, unchar offset, unsigned int *val) 
 {
+  volatile unsigned char *config_addr, *config_data;
+
+  if (bus>= BSP_MAX_PCI_BUS_ON_PCI0) {
+     bus-=BSP_MAX_PCI_BUS_ON_PCI0;
+     config_addr = (volatile unsigned char*) PCI1_CONFIG_ADDR;
+     config_data = (volatile unsigned char*) PCI1_CONFIG_DATA;
+  }
+  else {
+     config_addr = (volatile unsigned char*) pci.pci_config_addr;
+     config_data = (volatile unsigned char*) pci.pci_config_data;
+  }
+
   *val = 0xffffffff; 
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 #if 0
-  printk("addr %x, data %x, pack %x \n", BSP_pci_config[npci].pci_config_addr,
-    BSP_pci_config[npci].pci_config_data,pciConfigPack(bus,dev,func,offset)); 
+  printk("addr %x, data %x, pack %x \n", config_addr,
+    pci.pci_config_data,pciConfigPack(bus,dev,func,offset)); 
 #endif
-  outl(pciConfigPack(bus,dev,func,offset),BSP_pci_config[npci].pci_config_addr);
-  *val = inl(BSP_pci_config[npci].pci_config_data);
+  outl(pciConfigPack(bus,dev,func,offset),config_addr);
+  *val = inl(config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
-int PCIx_write_config_byte(int npci, unchar bus, unchar dev,
-unchar func, unchar offset, unchar val) 
+static int direct_pci_write_config_byte(unchar bus, unchar dev,unchar func, unchar offset, unchar val) 
 {
+  volatile unsigned char *config_addr, *config_data;
+
+  if (bus>= BSP_MAX_PCI_BUS_ON_PCI0) {
+     bus-=BSP_MAX_PCI_BUS_ON_PCI0;
+     config_addr = (volatile unsigned char*) PCI1_CONFIG_ADDR;
+     config_data = (volatile unsigned char*) PCI1_CONFIG_DATA;
+  }
+  else {
+     config_addr = pci.pci_config_addr;
+     config_data = pci.pci_config_data;
+  }
+
   if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
+#if 0
+  printk("addr %x, data %x, pack %x \n", config_addr,
+    config_data,pciConfigPack(bus,dev,func,offset));
+#endif
 
-  outl(pciConfigPack(bus,dev,func,offset),BSP_pci_config[npci].pci_config_addr);
-  outb(val, BSP_pci_config[npci].pci_config_data + (offset&3));
+  outl(pciConfigPack(bus,dev,func,offset), config_addr);
+  outb(val, config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
 
-int PCIx_write_config_word(int npci, unchar bus, unchar dev,
-unchar func, unchar offset, unsigned short val) 
+static int direct_pci_write_config_word(unchar bus, unchar dev,unchar func, unchar offset, unsigned short val) 
 {
+  volatile unsigned char *config_addr, *config_data;
+
+  if (bus>= BSP_MAX_PCI_BUS_ON_PCI0) {
+     bus-=BSP_MAX_PCI_BUS_ON_PCI0;
+     config_addr = (volatile unsigned char*) PCI1_CONFIG_ADDR;
+     config_data = (volatile unsigned char*) PCI1_CONFIG_DATA;
+  }
+  else {
+     config_addr = (volatile unsigned char*) pci.pci_config_addr;
+     config_data = (volatile unsigned char*) pci.pci_config_data;
+  }
+
   if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
-  outl(pciConfigPack(bus,dev,func,offset),BSP_pci_config[npci].pci_config_addr);
-  outw(val, BSP_pci_config[npci].pci_config_data + (offset&3));
+#if 0
+  printk("addr %x, data %x, pack %x \n", config_addr,
+    config_data,pciConfigPack(bus,dev,func,offset));
+#endif
+  outl(pciConfigPack(bus,dev,func,offset),config_addr);
+  outw(val, config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
 
-int PCIx_write_config_dword(int npci,unchar bus,unchar dev,
-unchar func, unchar offset, unsigned int val) 
+static int direct_pci_write_config_dword(unchar bus,unchar dev,unchar func, unchar offset, unsigned int val) 
 {
+  volatile unsigned char *config_addr, *config_data;
+
+  if (bus>= BSP_MAX_PCI_BUS_ON_PCI0) {
+     bus-=BSP_MAX_PCI_BUS_ON_PCI0;
+     config_addr = (volatile unsigned char *) PCI1_CONFIG_ADDR;
+     config_data = (volatile unsigned char *) PCI1_CONFIG_DATA;
+  }
+  else {
+     config_addr = (volatile unsigned char*) pci.pci_config_addr;
+     config_data = (volatile unsigned char*) pci.pci_config_data;
+  }
+
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 #if 0
-  printk("addr %x, data %x, pack %x \n", BSP_pci_config[npci].pci_config_addr,
-    BSP_pci_config[npci].pci_config_data,pciConfigPack(bus,dev,func,offset));
+  printk("addr %x, data %x, pack %x \n", config_addr,
+    config_data,pciConfigPack(bus,dev,func,offset));
 #endif
-  outl(pciConfigPack(bus,dev,func,offset),BSP_pci_config[npci].pci_config_addr);
-  outl(val,BSP_pci_config[npci].pci_config_data);
+  outl(pciConfigPack(bus,dev,func,offset),config_addr);
+  outl(val,config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
-/* backwards compatible with other PPC board for the vmeUniverse.c 
- * Note: We must override the default with these in pci.h
- */
-int pci_bsp_read_config_byte(unchar bus, unchar dev,unchar func,unchar offset,
-unchar *val)
-{
-  return(PCIx_read_config_byte(0, bus, dev, func, offset, val));
-}
-
-int pci_bsp_read_config_word(unchar bus, unchar dev,
-unchar func, unchar offset, unsigned short *val)
-{
-  return(PCIx_read_config_word(0, bus, dev, func, offset, val));
-}
-
-int pci_bsp_read_config_dword(unchar bus, unchar dev,
-unchar func, unchar offset, unsigned int *val) 
-{
-  return(PCIx_read_config_dword(0, bus, dev, func, offset, val));
-}
-
-int pci_bsp_write_config_byte(unchar bus, unchar dev,
-unchar func, unchar offset, unchar val) 
-{
-  return(PCIx_write_config_byte(0, bus, dev, func, offset, val));
-}
-
-int pci_bsp_write_config_word(unchar bus, unchar dev,
-unchar func, unchar offset, unsigned short val) 
-{
-  return(PCIx_write_config_word(0, bus, dev, func, offset, val));
-}
-
-int pci_bsp_write_config_dword(unchar bus,unchar dev,
-unchar func, unchar offset, unsigned int val) 
-{
-  return(PCIx_write_config_dword(0, bus, dev, func, offset, val));
-}
+const pci_config_access_functions pci_direct_functions = {
+  	direct_pci_read_config_byte,
+  	direct_pci_read_config_word,
+  	direct_pci_read_config_dword,
+  	direct_pci_write_config_byte,
+  	direct_pci_write_config_word,
+  	direct_pci_write_config_dword
+};
 
 
-pci_bsp_config BSP_pci_config[2] = {
-  {PCI0_CONFIG_ADDR,PCI0_CONFIG_DATA/*,&pci_functions*/},
-       {PCI1_CONFIG_ADDR,PCI1_CONFIG_DATA/*,&pci_functions*/}
-};
+pci_config BSP_pci_configuration = {(volatile unsigned char*) PCI_CONFIG_ADDR,
+			 (volatile unsigned char*)PCI_CONFIG_DATA,
+				    &pci_direct_functions};
 
 /*
- * This routine determines the maximum bus number in the system
+ * This routine determines the maximum bus number in the system.
+ * The PCI_SUBORDINATE_BUS is not supported in GT6426xAB. Thus,
+ * it's not used.
+ *
  */
 int pci_initialize()
 {
-  int PciNumber;
+  int deviceFound;
   unchar ucBusNumber, ucSlotNumber, ucFnNumber, ucNumFuncs;
   unsigned int ulHeader;
-  unsigned int pcidata, ulDeviceID;
-#if PCI_DEBUG
-  unsigned int data, pcidata, ulClass;
-  unsigned short sdata;
-#endif
+  unsigned int pcidata, ulClass, ulDeviceID;
 
-  PCI_interface();
+  pci_interface();
   
   /*
-   * Scan PCI0 and PCI1 bus0
+   * Scan PCI0 and PCI1 buses
    */
-  for (PciNumber=0; PciNumber < 2; PciNumber++) {
-    pciAccessInit(PciNumber);
-    for (ucBusNumber=0; ucBusNumber< 2; ucBusNumber++) {
+  for (ucBusNumber=0; ucBusNumber<BSP_MAX_PCI_BUS; ucBusNumber++) {
+    deviceFound=0;
     for (ucSlotNumber=0;ucSlotNumber<PCI_MAX_DEVICES;ucSlotNumber++) {
       ucFnNumber = 0;
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
 				ucSlotNumber,
 				0,
-				PCI0_VENDOR_ID,
+				PCI_VENDOR_ID,
 				&ulDeviceID);
 
       if( ulDeviceID==PCI_INVALID_VENDORDEVICEID) {
@@ -206,101 +273,103 @@ int pci_initialize()
         continue;
       }
 
-      if (++numPCIDevs > MAX_NUM_PCI_DEVICES) {
-	 BSP_panic("Too many PCI devices found; increase MAX_NUM_PCI_DEVICES in pcicache.c\n");
+      if (++numPCIDevs > PCI_MAX_DEVICES) {
+	 BSP_panic("Too many PCI devices found; increase PCI_MAX_DEVICES in pci.h\n");
       }
 
+      if (!deviceFound) deviceFound=1;
       switch(ulDeviceID) { 
         case (PCI_VENDOR_ID_MARVELL+(PCI_DEVICE_ID_MARVELL_GT6426xAB<<16)):
 #if PCI_PRINT
-	  printk("Marvell GT6426xA/B hostbridge detected at PCI%d bus%d slot%d\n",
-                 PciNumber,ucBusNumber,ucSlotNumber);
+	  printk("Marvell GT6426xA/B hostbridge detected at bus%d slot%d\n",
+                 ucBusNumber,ucSlotNumber);
 #endif
-          ucMaxPCIBus ++;
 	  break;
         case (PCI_VENDOR_ID_PLX2+(PCI_DEVICE_ID_PLX2_PCI6154_HB2<<16)):
 #if PCI_PRINT
-          printk("PLX PCI6154 PCI-PCI bridge detected at PCI%d bus%d slot%d\n",
-                 PciNumber,ucBusNumber,ucSlotNumber);
+          printk("PLX PCI6154 PCI-PCI bridge detected at bus%d slot%d\n",
+                 ucBusNumber,ucSlotNumber);
 #endif
-          ucMaxPCIBus ++;
           break;
         case PCI_VENDOR_ID_TUNDRA:
 #if PCI_PRINT
-          printk("TUNDRA PCI-VME bridge detected at PCI%d bus%d slot%d\n",
-                 PciNumber,ucBusNumber,ucSlotNumber);
+          printk("TUNDRA PCI-VME bridge detected at bus%d slot%d\n",
+                 ucBusNumber,ucSlotNumber);
 #endif
-          ucMaxPCIBus ++;
           break;
       case (PCI_VENDOR_ID_INTEL+(PCI_DEVICE_INTEL_82544EI_COPPER<<16)):
 #if PCI_PRINT
-          printk("INTEL 82544EI COPPER network controller detected at PCI%d bus%d slot%d\n",
-                 PciNumber,ucBusNumber,ucSlotNumber);
+          printk("INTEL 82544EI COPPER network controller detected at bus%d slot%d\n",
+                 ucBusNumber,ucSlotNumber);
 #endif
-          ucMaxPCIBus ++;
           break;
-        default : 
-#if PCI_PRINT
-          printk("PCI%d Bus%d Slot%d DeviceID 0x%x \n",
-             PciNumber,ucBusNumber,ucSlotNumber, ulDeviceID);
+      case (PCI_VENDOR_ID_DEC+(PCI_DEVICE_ID_DEC_21150<<16)):
+ #if PCI_PRINT
+          printk("DEC21150 PCI-PCI bridge detected at bus%d slot%d\n",
+                 ucBusNumber,ucSlotNumber);
 #endif
+	  break;
+       default : 
+          printk("BSP unlisted vendor, Bus%d Slot%d DeviceID 0x%x \n",
+             ucBusNumber,ucSlotNumber, ulDeviceID);
           break;
       }
+
 #if PCI_DEBUG
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
 			  ucSlotNumber,
 			  0,
-			  PCI0_BASE_ADDRESS_0,
+			  PCI_BASE_ADDRESS_0,
                           &data);
-      printk("PCI%d_BASE_ADDRESS_0 0x%x \n",PciNumber, data);  
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      printk("Bus%d BASE_ADDRESS_0 0x%x \n",ucBusNumber, data);  
+      pci_read_config_dword(ucBusNumber,
 			  ucSlotNumber,
 			  0,
-			  PCI0_BASE_ADDRESS_1,
+			  PCI_BASE_ADDRESS_1,
                           &data);
-      printk("PCI%d_BASE_ADDRESS_1 0x%x \n",PciNumber, data);
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      printk("Bus%d BASE_ADDRESS_1 0x%x \n",ucBusNumber, data);
+      pci_read_config_dword(ucBusNumber,
  			  ucSlotNumber,
 			  0,
-			  PCI0_BASE_ADDRESS_2,
+			  PCI_BASE_ADDRESS_2,
                           &data);
-      printk("PCI%d_BASE_ADDRESS_2 0x%x \n",PciNumber, data);
+      printk("Bus%d BASE_ADDRESS_2 0x%x \n", ucBusNumber, data);
 
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
  			  ucSlotNumber,
 			  0,
-			  PCI0_BASE_ADDRESS_3,
+			  PCI_BASE_ADDRESS_3,
                           &data);
-      printk("PCI%d_BASE_ADDRESS_3 0x%x \n",PciNumber, data);  
+      printk("Bus%d BASE_ADDRESS_3 0x%x \n", ucBusNumber, data);  
 
-     PCIx_read_config_word(PciNumber, ucBusNumber,
+      pci_read_config_word(ucBusNumber,
  			  ucSlotNumber,
 			  0,
-			  PCI0_INTERRUPT_LINE,
+			  PCI_INTERRUPT_LINE,
                           &sdata);
-      printk("PCI%d_INTERRUPT_LINE 0x%x \n",PciNumber, sdata);  
+      printk("Bus%d INTERRUPT_LINE 0x%x \n", ucBusNumber, sdata);  
 
       /* We always enable internal memory. */
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
  			  ucSlotNumber,
 			  0,
-			  PCI0_MEM_BASE_ADDR,
+			  PCI_MEM_BASE_ADDR,
 			  &pcidata);
-      printk("PCI%d_MEM_BASE_ADDR 0x%x \n", PciNumber,pcidata);
+      printk("Bus%d MEM_BASE_ADDR 0x%x \n", ucBusNumber,pcidata);
 
       /* We always enable internal IO. */
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
  			  ucSlotNumber,
 			  0,
-			  PCI0_IO_BASE_ADDR,
+			  PCI_IO_BASE_ADDR,
 			  &pcidata);
-      printk("PCI%d_IO_BASE_ADDR 0x%x \n", PciNumber,pcidata);
+      printk("Bus%d IO_BASE_ADDR 0x%x \n", ucBusNumber,pcidata);
 #endif
 
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
 			  ucSlotNumber,
 			  0,
-			  PCI0_CACHE_LINE_SIZE,
+			  PCI_CACHE_LINE_SIZE,
 			  &ulHeader);
       if ((ulHeader>>16)&PCI_MULTI_FUNCTION)
          ucNumFuncs=PCI_MAX_FUNCTIONS;
@@ -308,41 +377,38 @@ int pci_initialize()
          ucNumFuncs=1;
 
 #if PCI_DEBUG
-      printk("PCI%d Slot 0x%x HEADER/LAT/CACHE 0x%x \n",
-             PciNumber,ucSlotNumber, ulHeader);    
+      printk("Bus%d Slot 0x%x HEADER/LAT/CACHE 0x%x \n",
+             ucBusNumber, ucSlotNumber, ulHeader);    
+#endif
 
       for (ucFnNumber=1;ucFnNumber<ucNumFuncs;ucFnNumber++) {
-          PCIx_read_config_dword(PciNumber, ucBusNumber,
+          pci_read_config_dword(ucBusNumber,
 				  ucSlotNumber,
 				  ucFnNumber,
-				  PCI0_VENDOR_ID,
+				  PCI_VENDOR_ID,
 				  &ulDeviceID);
           if (ulDeviceID==PCI_INVALID_VENDORDEVICEID) {
 	     /* This slot/function is empty */
 	     continue;
           }
-          if (++numPCIDevs > MAX_NUM_PCI_DEVICES) {
-	     BSP_panic("Too many PCI devices found; increase MAX_NUM_PCI_DEVICES in pcicache.c\n");
-          }
 
          /* This slot/function has a device fitted.*/
-         PCIx_read_config_dword(PciNumber, ucBusNumber,
+         pci_read_config_dword(ucBusNumber,
 				  ucSlotNumber,
 				  ucFnNumber,
-				  PCI0_CLASS_REVISION,
-				  &ulClass);     
-         printk("PCI%d Slot 0x%x Func %d classID 0x%x \n",PciNumber,ucSlotNumber,
+				  PCI_CLASS_REVISION,
+				  &ulClass); 
+#if PCI_DEBUG    
+         printk("Bus%d Slot 0x%x Func %d classID 0x%x \n",ucBusNumber,ucSlotNumber,
              ucFnNumber, ulClass);
+#endif
 
-         ulClass >>= 16;
-         if (ulClass == PCI_CLASS_GT6426xAB)
-	    printk("GT64260-PCI%d bridge found \n", PciNumber);
       }
-#endif
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+
+      pci_read_config_dword(ucBusNumber,
 			       ucSlotNumber,
 			       0,
-			  PCI0_COMMAND,
+			  PCI_COMMAND,
                           &pcidata); 
 #if PCI_DEBUG
       printk("MOTLoad command staus 0x%x, ", pcidata);
@@ -352,26 +418,32 @@ int pci_initialize()
 	pcidata |= PCI_STATUS_CLRERR_MASK;
       /* Enable bus,I/O and memory master access. */
       pcidata |= (PCI_COMMAND_MASTER|PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
-      PCIx_write_config_dword(PciNumber, ucBusNumber,
+      pci_write_config_dword(ucBusNumber,
  			       ucSlotNumber,
 			       0,
-			  PCI0_COMMAND,
+			  PCI_COMMAND,
                           pcidata);
 
-      PCIx_read_config_dword(PciNumber, ucBusNumber,
+      pci_read_config_dword(ucBusNumber,
 			       ucSlotNumber,
 			       0,
-			  PCI0_COMMAND,
+			  PCI_COMMAND,
                           &pcidata); 
 #if PCI_DEBUG      
       printk("Now command/staus 0x%x\n", pcidata);
 #endif
- 
     }
-    }
-  } /* PCI number */
+    if (deviceFound) ucMaxPCIBus++;
+  } /* for (ucBusNumber=0; ucBusNumber<BSP_MAX_PCI_BUS; ... */
+#if PCI_DEBUG
+  printk("number of PCI buses: %d, numPCIDevs %d\n", 
+	 pci_bus_count(), numPCIDevs);
+#endif
+  return(0);
+}
 
-  return PCIB_ERR_SUCCESS;
+void FixupPCI( struct _int_map *bspmap, int (*swizzler)(int,int) )
+{
 }
 
 /*