diff options
author | Eric Norum <WENorum@lbl.gov> | 2004-10-20 15:21:05 +0000 |
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committer | Eric Norum <WENorum@lbl.gov> | 2004-10-20 15:21:05 +0000 |
commit | 7be6ad9701934100d2929abbcce770da1e0a005f (patch) | |
tree | 5b8fc8b6cfcf0a61594e54f8fc2fafc6a4dc1a25 /c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c | |
parent | 2004-10-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
download | rtems-7be6ad9701934100d2929abbcce770da1e0a005f.tar.bz2 |
Add MVME550 BSP
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c new file mode 100644 index 0000000000..c36191e33e --- /dev/null +++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c @@ -0,0 +1,72 @@ +/* + * detect_host_bridge.c + * + * This code is inspired by detect_grackle_bridge.c of SVGM BSP + * written by Till Straumann + * Copyright (C) 2001, 2003 Till Straumann <strauman@slac.stanford.edu> + * + * Copyright (C) 2004 S. Kate Feng, <feng1@bnl.gov> + * wrote it to support the MVME5500 board. + * + */ +#include <libcpu/io.h> +#include <rtems/bspIo.h> /* printk */ + +#include <bsp/pci.h> +#include <bsp/gtreg.h> +#include <bsp/gtpcireg.h> + +#include <stdio.h> +#include <string.h> + +#define PCI_DEBUG 0 + +#define PCI_INVALID_VENDORDEVICEID 0xffffffff +#define PCI_MULTI_FUNCTION 0x80 +#define HOSTBRIDGET_ERROR 0xf0000000 + +unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet) +{ + unsigned int pcidata, pcidata1; + int PciNumber; + + /* On the mvme5500 board, the GT64260B system controller had the MCP + * signal pulled up high. Thus, the MCP signal is not used as it is + * on other boards such as mvme2307. + */ + if (enableMCP) return(-1); + for (PciNumber=0; PciNumber<1; PciNumber++) { + PCIx_read_config_dword(PciNumber, 0, + 0, + 0, + PCI0_COMMAND+(PciNumber * 0x80), + &pcidata); + + if (!quiet) + printk("Before _BSP_clear_hostbridge_errors(): 0x%x, cause 0x%x\n", + pcidata, inl(0x1d58)); + + outl(0,0x1d58); + + /* Clear the error on the host bridge */ + pcidata1= pcidata; + pcidata1 |= PCI_STATUS_CLRERR_MASK; + pcidata1 |= 0x140; + PCIx_write_config_dword(PciNumber, 0, + 0, + 0, + PCI0_COMMAND+(PciNumber * 0x80), + pcidata1); + + PCIx_read_config_dword(PciNumber, 0, + 0, + 0, + PCI0_COMMAND+(PciNumber * 0x80), + &pcidata1); + + if (!quiet) printk("After _BSP_clear_hostbridge_errors(): sts 0x%x\n", + pcidata1); + if (pcidata1 & HOSTBRIDGET_ERROR) printk("BSP_clear_hostbridge_errors(): unable to clear pending hostbridge errors\n"); + } + return(pcidata & HOSTBRIDGET_ERROR); +} |