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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-10-22 14:46:02 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-10-22 14:46:02 +0000
commit5edbffe3f64131c582839e0bbd389fda5eeb407c (patch)
tree81ab7ce00a76f8f8cae955ef5fac8fb4cd9cc7f1 /c/src/lib/libbsp/powerpc/mpc8260ads/startup
parent2001-10-22 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-5edbffe3f64131c582839e0bbd389fda5eeb407c.tar.bz2
01-10-22 Andy Dachs <a.dachs@sstl.co.uk>
* mpc8260ads added as new BSP. tm27 reported not to run at this time. * ChangeLog, Makefile.am, README, aclocal.m4, bsp_specs, clock/.cvsignore, clock/Makefile.am, clock/p_clock.c, configure.in, console/Makefile.am, console/console.c, include/Makefile.am, include/bsp.h, include/coverhd.h, irq/.cvsignore, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c, network/Makefile.am, network/README, network/if_hdlcsubr.c, network/if_hdlcsubr.h, network/network.c, start/Makefile.am, start/start.S, startup/Makefile.am, startup/bspstart.c, startup/cpuinit.c, startup/linkcmds, startup/setvec.c, times, vectors/.cvsignore, vectors/Makefile.am, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c, wrapup/Makefile.am: New files.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mpc8260ads/startup')
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/startup/Makefile.am43
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c370
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c51
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds285
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/startup/setvec.c43
5 files changed, 792 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/Makefile.am b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/Makefile.am
new file mode 100644
index 0000000000..4291994005
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/Makefile.am
@@ -0,0 +1,43 @@
+##
+## $Id$
+##
+
+AUTOMAKE_OPTIONS = foreign 1.4
+
+VPATH = @srcdir@:@srcdir@/../../../shared
+
+PGM = $(ARCH)/startup.rel
+
+C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c bootcard.c \
+ main.c sbrk.c setvec.c gnatinstallhandler.c cpuinit.c
+C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
+
+S_FILES =
+S_O_FILES = $(S_FILES:%.s=$(ARCH)/%.o)
+
+OBJS = $(C_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../../../../../../automake/compile.am
+include $(top_srcdir)/../../../../../../automake/lib.am
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+$(PGM): $(OBJS)
+ $(make-rel)
+
+$(PROJECT_RELEASE)/lib/linkcmds: linkcmds
+ $(INSTALL_DATA) $< $@
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/linkcmds
+
+all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
+
+.PRECIOUS: $(PGM)
+
+EXTRA_DIST = bspstart.c linkcmds setvec.c
+
+include $(top_srcdir)/../../../../../../automake/local.am
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
new file mode 100644
index 0000000000..ebb8bf917b
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
@@ -0,0 +1,370 @@
+/* bsp_start()
+ *
+ * This routine starts the application. It includes application,
+ * board, and monitor specific initialization and configuration.
+ * The generic CPU dependent initialization has been performed
+ * before this routine is invoked.
+ *
+ * The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
+ *
+ * Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
+ * Surrey Satellite Technology Limited, 2001
+ * A 40MHz system clock is assumed.
+ * The PON. RST.CONF. Dip switches (DS1) are
+ * 1 - Off
+ * 2 - On
+ * 3 - Off
+ * 4 - On
+ * 5 - Off
+ * 6 - Off
+ * 7 - Off
+ * 8 - Off
+ * Dip switches on DS2 and DS3 are all set to ON
+ * The LEDs on the board are used to signal panic and fatal_error
+ * conditions.
+ * The mmu is unused at this time.
+ *
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.OARcorp.com/rtems/license.html.
+ *
+ * $Id$
+ */
+
+#include <bsp.h>
+
+/*
+#include <mmu.h>
+*/
+
+#include <mpc8260.h>
+#include <rtems/libio.h>
+#include <rtems/libcsupport.h>
+#include <rtems/score/thread.h>
+
+#include <string.h>
+
+#ifdef STACK_CHECKER_ON
+#include <stackchk.h>
+#endif
+
+
+
+/*
+ * The original table from the application (in ROM) and our copy of it with
+ * some changes. Configuration is defined in <confdefs.h>. Make sure that
+ * our configuration tables are uninitialized so that they get allocated in
+ * the .bss section (RAM).
+ */
+extern rtems_configuration_table Configuration;
+extern unsigned long intrStackPtr;
+rtems_configuration_table BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+char *rtems_progname;
+
+
+/*
+ * Use the shared implementations of the following routines.
+ * Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
+ * rtems/c/src/lib/libbsp/shared/bsplibc.c.
+ */
+void bsp_postdriver_hook(void);
+void bsp_libc_init( void *, unsigned32, int );
+
+
+void BSP_panic(char *s)
+{
+ _BSP_GPLED1_on();
+ printk("%s PANIC %s\n",_RTEMS_version, s);
+ __asm__ __volatile ("sc");
+}
+
+void _BSP_Fatal_error(unsigned int v)
+{
+ _BSP_GPLED0_on();
+ _BSP_GPLED1_on();
+ printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
+ __asm__ __volatile ("sc");
+}
+
+void _BSP_GPLED0_on()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr0 &= ~GP0_LED; /* Turn on GP0 LED */
+}
+
+void _BSP_GPLED0_off()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr0 |= GP0_LED; /* Turn off GP0 LED */
+}
+
+void _BSP_GPLED1_on()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr0 &= ~GP1_LED; /* Turn on GP1 LED */
+}
+
+void _BSP_GPLED1_off()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr0 |= GP1_LED; /* Turn off GP1 LED */
+}
+
+void _BSP_Uart1_enable()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr1 &= ~UART1_E; /* Enable Uart1 */
+}
+
+void _BSP_Uart1_disable()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr1 |= UART1_E; /* Disable Uart1 */
+}
+
+void _BSP_Uart2_enable()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr1 &= ~UART2_E; /* Enable Uart2 */
+}
+
+void _BSP_Uart2_disable()
+{
+ BCSR *csr;
+ csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+ csr->bcsr1 |= UART2_E; /* Disable Uart2 */
+
+}
+
+
+
+
+
+
+extern void m8260_console_reserve_resources(rtems_configuration_table *);
+
+
+/*
+ * Function: bsp_pretasking_hook
+ * Created: 95/03/10
+ *
+ * Description:
+ * BSP pretasking hook. Called just before drivers are initialized.
+ * Used to setup libc and install any BSP extensions.
+ *
+ * NOTES:
+ * Must not use libc (to do io) from here, since drivers are
+ * not yet initialized.
+ *
+ */
+
+void
+bsp_pretasking_hook(void)
+{
+ /*
+ * These are assigned addresses in the linkcmds file for the BSP. This
+ * approach is better than having these defined as manifest constants and
+ * compiled into the kernel, but it is still not ideal when dealing with
+ * multiprocessor configuration in which each board as a different memory
+ * map. A better place for defining these symbols might be the makefiles.
+ * Consideration should also be given to developing an approach in which
+ * the kernel and the application can be linked and burned into ROM
+ * independently of each other.
+ */
+ extern unsigned char _HeapStart;
+ extern unsigned char _HeapEnd;
+
+ bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
+
+
+
+#ifdef STACK_CHECKER_ON
+ /*
+ * Initialize the stack bounds checker
+ * We can either turn it on here or from the app.
+ */
+
+ Stack_check_Initialize();
+#endif
+
+#ifdef RTEMS_DEBUG
+ rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+
+
+void bsp_start(void)
+{
+ extern void *_WorkspaceBase;
+ extern int _end;
+ rtems_unsigned32 heap_start;
+ rtems_unsigned32 ws_start;
+ ppc_cpu_id_t myCpu;
+ ppc_cpu_revision_t myCpuRevision;
+ register unsigned char* intrStack;
+ register unsigned int intrNestingLevel = 0;
+
+
+ /* Set MPC8260ADS board LEDS and Uart enable lines */
+ _BSP_GPLED0_off();
+ _BSP_GPLED1_off();
+ _BSP_Uart1_enable();
+ _BSP_Uart2_enable();
+
+
+ /*
+ * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
+ * store the result in global variables so that it can be used latter...
+ */
+ myCpu = get_ppc_cpu_type();
+ myCpuRevision = get_ppc_cpu_revision();
+
+
+
+ cpu_init();
+
+/*
+ mmu_init();
+*/
+ /*
+ * Initialize some SPRG registers related to irq handling
+ */
+
+ intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
+ asm volatile ("mtspr 273, %0" : "=r" (intrStack) : "0" (intrStack));
+ asm volatile ("mtspr 272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
+
+/*
+ printk( "About to call initialize_exceptions\n" );
+*/
+ /*
+ * Install our own set of exception vectors
+ */
+
+ initialize_exceptions();
+
+/*
+ mmu_init();
+*/
+
+ /*
+ * Enable instruction and data caches. Do not force writethrough mode.
+ */
+#if INSTRUCTION_CACHE_ENABLE
+ rtems_cache_enable_instruction();
+#endif
+#if DATA_CACHE_ENABLE
+ rtems_cache_enable_data();
+#endif
+
+ /*
+ * Allocate the memory for the RTEMS Work Space. This can come from
+ * a variety of places: hard coded address, malloc'ed from outside
+ * RTEMS world (e.g. simulator or primitive memory manager), or (as
+ * typically done by stock BSPs) by subtracting the required amount
+ * of work space from the last physical address on the CPU board.
+ */
+
+ /*
+ * Need to "allocate" the memory for the RTEMS Workspace and
+ * tell the RTEMS configuration where it is. This memory is
+ * not malloc'ed. It is just "pulled from the air".
+ */
+
+ BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
+
+
+/*
+ BSP_Configuration.microseconds_per_tick = 1000;
+*/
+
+ /*
+ * initialize the CPU table for this BSP
+ */
+
+ Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
+ Cpu_table.postdriver_hook = bsp_postdriver_hook;
+ if( Cpu_table.interrupt_stack_size < 4*1024 )
+ Cpu_table.interrupt_stack_size = 4 * 1024;
+
+ Cpu_table.clicks_per_usec = 10; /* for 40MHz extclk */
+ Cpu_table.serial_per_sec = 40000000;
+ Cpu_table.serial_external_clock = 0;
+ Cpu_table.serial_xon_xoff = 0;
+ Cpu_table.serial_cts_rts = 0;
+ Cpu_table.serial_rate = 9600;
+ Cpu_table.timer_average_overhead = 3;
+ Cpu_table.timer_least_valid = 3;
+ Cpu_table.clock_speed = 40000000;
+
+
+
+
+#ifdef REV_0_2
+ /* set up some board specific registers */
+ m8260.siumcr &= 0xF3FFFFFF; /* set TBEN ** BUG FIX ** */
+ m8260.siumcr |= 0x08000000;
+#endif
+
+ /* use BRG1 to generate 32kHz timebase */
+/*
+ m8260.brgc1 = M8260_BRG_EN + (unsigned32)(((unsigned16)((40016384)/(32768)) - 1) << 1) + 0;
+*/
+
+
+ /*
+ * Initalize RTEMS IRQ system
+ */
+ BSP_rtems_irq_mng_init(0);
+
+
+ /*
+ * Call this in case we use TERMIOS for console I/O
+ */
+
+ m8xx_uart_reserve_resources(&BSP_Configuration);
+
+/*
+ rtems_termios_initialize();
+*/
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Exit from bspstart\n");
+#endif
+
+}
+
+/*
+ *
+ * _Thread_Idle_body
+ *
+ * Replaces the one in c/src/exec/score/src/threadidlebody.c
+ * The MSR[POW] bit is set to put the CPU into the low power mode
+ * defined in HID0. HID0 is set during starup in start.S.
+ *
+ */
+Thread _Thread_Idle_body(
+ unsigned32 ignored )
+{
+
+ for( ; ; )
+ {
+ asm volatile(
+ "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
+ );
+ }
+}
+
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c
new file mode 100644
index 0000000000..8c5ff89d4b
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c
@@ -0,0 +1,51 @@
+/*
+ * cpuinit.c - this file contains functions for initializing the CPU
+ *
+ * Written by Jay Monkman (jmonkman@frasca.com)
+ *
+ * $Id$
+ */
+
+#include <bsp.h>
+
+/* Macros for handling all the MMU SPRs */
+#define PUT_IC_CST(r) __asm__ volatile ("mtspr 0x230,%0\n" ::"r"(r))
+#define GET_IC_CST(r) __asm__ volatile ("mfspr %0,0x230\n" :"=r"(r))
+#define PUT_DC_CST(r) __asm__ volatile ("mtspr 0x238,%0\n" ::"r"(r))
+#define GET_DC_CST(r) __asm__ volatile ("mfspr %0,0x238\n" :"=r"(r))
+
+void cpu_init(void)
+{
+ /* BRGCLK is VCO_OUT/4 */
+/*
+ m8260.sccr = 0;
+*/
+
+#if 0
+ register unsigned long t1, t2;
+
+ /* Let's clear MSR[IR] and MSR[DR] */
+ t2 = PPC_MSR_IR | PPC_MSR_DR;
+ __asm__ volatile (
+ "mfmsr %0\n"
+ "andc %0, %0, %1\n"
+ "mtmsr %0\n" :"=r"(t1), "=r"(t2):
+ "1"(t2));
+
+ t1 = M8xx_CACHE_CMD_UNLOCK;
+ /* PUT_DC_CST(t1); */
+ PUT_IC_CST(t1);
+
+ t1 = M8xx_CACHE_CMD_INVALIDATE;
+ /* PUT_DC_CST(t1); */
+ PUT_IC_CST(t1);
+
+ t1 = M8xx_CACHE_CMD_ENABLE;
+ PUT_IC_CST(t1);
+
+ t1 = M8xx_CACHE_CMD_SFWT;
+ /* PUT_DC_CST(t1); */
+ t1 = M8xx_CACHE_CMD_ENABLE;
+ /* PUT_DC_CST(t1);*/
+#endif
+}
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
new file mode 100644
index 0000000000..2e2314166d
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
@@ -0,0 +1,285 @@
+/*
+ * This file contains directives for the GNU linker which are specific
+ * to the MPC8260ADS Board
+ *
+ * $Id$
+ */
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+ "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+ SEARCH_DIR(/usr/local/rtems/powerpc-rtems/lib);
+
+ENTRY(start)
+
+/*
+ * Declare some sizes.
+ * XXX: The assignment of ". += XyzSize;" fails in older gld's if the
+ * number used there is not constant. If this happens to you, edit
+ * the lines marked XXX below to use a constant value.
+ */
+HeapSize = DEFINED(HeapSize) ? HeapSize : 0x400000; /* 4M Heap */
+StackSize = DEFINED(StackSize) ? StackSize : 0x8000;
+WorkSpaceSize = DEFINED(WorkSpaceSize) ? WorkSpaceSize : 0x80000; /* 512k */
+RamDiskSize = DEFINED(RamDiskSize) ? RamDiskSize : 0x0800000; /* 8M ram disk */
+
+MEMORY
+ {
+ ram : org = 0x0, l = 16M
+ dpram : org = 0x04700000, l = 128K
+ flash : org = 0xff800000, l = 8M
+ }
+
+
+SECTIONS
+{
+
+ /*
+ * The stack will live in this area - between the vectors and
+ * the text section.
+ */
+
+ .text 0x10000:
+ {
+ _textbase = .;
+
+
+ text.start = .;
+
+ /* Entry point is the .entry section */
+ *(.entry)
+ *(.entry2)
+
+ /* Actual Code */
+ *(.text)
+ *(.text.*)
+
+
+ *(.rodata)
+ *(.rodata1)
+
+ /* C++ constructors/destructors */
+ *(.gnu.linkonce.t*)
+
+ /* Initialization and finalization code.
+ *
+ * Various files can provide initialization and finalization functions.
+ * The bodies of these functions are in .init and .fini sections. We
+ * accumulate the bodies here, and prepend function prologues from
+ * ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
+ * first; ecrtn.o must be linked last. Because these are wildcards, it
+ * doesn't matter if the user does not actually link against ecrti.o and
+ * ecrtn.o; the linker won't look for a file to match a wildcard. The
+ * wildcard also means that it doesn't matter which directory ecrti.o
+ * and ecrtn.o are in.
+ */
+ PROVIDE (_init = .);
+ *ecrti.o(.init)
+ *(.init)
+ *ecrtn.o(.init)
+
+ PROVIDE (_fini = .);
+ *ecrti.o(.fini)
+ *(.fini)
+ *ecrtn.o(.init)
+
+ /*
+ * C++ constructors and destructors for static objects.
+ * PowerPC EABI does not use crtstuff yet, so we build "old-style"
+ * constructor and destructor lists that begin with the list lenght
+ * end terminate with a NULL entry.
+ */
+
+ PROVIDE (__CTOR_LIST__ = .);
+ /* LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) */
+ *crtbegin.o(.ctors)
+ *(.ctors)
+ *crtend.o(.ctors)
+ LONG(0)
+ PROVIDE (__CTOR_END__ = .);
+
+ PROVIDE (__DTOR_LIST__ = .);
+ /* LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) */
+ *crtbegin.o(.dtors)
+ *(.dtors)
+ *crtend.o(.dtors)
+ LONG(0)
+ PROVIDE (__DTOR_END__ = .);
+
+ /* Exception frame info */
+ *(.eh_frame)
+
+ /* Miscellaneous read-only data */
+ _rodata_start = . ;
+ *(.gnu.linkonce.r*)
+ *(.lit)
+ *(.shdata)
+ *(.rodata)
+ *(.rodata1)
+ *(.descriptors)
+ *(rom_ver)
+ _erodata = .;
+
+
+ /* Various possible names for the end of the .text section */
+ etext = ALIGN(0x10);
+ _etext = .;
+ _endtext = .;
+ text.end = .;
+ PROVIDE (etext = .);
+ PROVIDE (__etext = .);
+
+ } > ram
+
+
+ PROVIDE (__EXCEPT_START__ = .);
+ .gcc_except_table : { *(.gcc_except_table) } >RAM
+ PROVIDE (__EXCEPT_END__ = .);
+ __GOT_START__ = .;
+ .got :
+ {
+ s.got = .;
+ *(.got.plt) *(.got)
+ } > ram
+ __GOT_END__ = .;
+
+ .got1 : { *(.got1) } >ram
+ PROVIDE (__GOT2_START__ = .);
+ PROVIDE (_GOT2_START_ = .);
+ .got2 : { *(.got2) } >ram
+ PROVIDE (__GOT2_END__ = .);
+ PROVIDE (_GOT2_END_ = .);
+
+ PROVIDE (__FIXUP_START__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ .fixup : { *(.fixup) } >ram
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END__ = .);
+
+ PROVIDE (__SDATA2_START__ = .);
+ .sdata2 : { *(.sdata2) } >ram
+ .sbss2 : { *(.sbss2) } >ram
+ PROVIDE (__SBSS2_END__ = .);
+
+ .sbss2 : { *(.sbss2) } >ram
+ PROVIDE (__SBSS2_END__ = .);
+
+ __SBSS_START__ = .;
+ .bss :
+ {
+ bss.start = .;
+ *(.bss) *(.sbss) *(COMMON)
+ . = ALIGN(4);
+ bss.end = .;
+ } > ram
+ __SBSS_END__ = .;
+
+
+
+
+
+ /* R/W Data */
+ .data ( . ) :
+ {
+ . = ALIGN (4);
+
+ data.start = .;
+
+ *(.data)
+ *(.data1)
+ *(.gnu.linkonce.d.*)
+ PROVIDE (__SDATA_START__ = .);
+ *(.sdata)
+
+ data.end = .;
+ } > ram
+
+ data.size = data.end - data.start;
+ bss.size = bss.end - bss.start;
+ text.size = text.end - text.start;
+
+ PROVIDE(_end = data.end);
+
+ .gzipmalloc : {
+ . = ALIGN (16);
+ _startmalloc = .;
+ } >ram
+
+
+ /*
+ * Interrupt stack setup
+ */
+ IntrStack_start = ALIGN(0x10);
+ . += 0x4000;
+ intrStack = .;
+ PROVIDE(intrStackPtr = intrStack);
+
+
+ _HeapStart = .;
+ __HeapStart = .;
+ . += HeapSize;
+ _HeapEnd = .;
+ __HeapEnd = .;
+
+ clear_end = .;
+
+
+ _WorkspaceBase = .;
+ __WorkspaceBase = .;
+ . += WorkSpaceSize;
+
+
+ _RamDiskBase = .;
+ __RamDiskBase = .;
+ . += RamDiskSize;
+ _RamDiskEnd = .;
+ __RamDiskEnd = .;
+ PROVIDE( _RamDiskSize = _RamDiskEnd - _RamDiskBase );
+
+ /* Sections for compressed .text and .data */
+ /* after the .datarom section is an int specifying */
+ /* the length of the following compressed image */
+ /* Executes once then could get overwritten */
+ .textrom 0x100000 :
+ {
+ *(.textrom)
+ _endloader = .;
+ } > ram
+
+ .datarom :
+ {
+ _dr_start = .;
+ *(.datarom)
+ _dr_end = .;
+ } > ram
+ dr_len = _dr_end - _dr_start;
+
+ .dpram :
+ {
+ m8260 = .;
+ _m8260 = .;
+ . += (128 * 1024);
+ } > dpram
+
+
+ /* the reset vector is at 0xfff00000 which is */
+ /* located at offset 0x400000 from the base */
+ /* of flash */
+ .bootrom 0xFFF00000 :
+ {
+ *(.bootrom)
+ _endboot = .;
+ } > flash
+
+
+ .line 0 : { *(.line) }
+ .debug 0 : { *(.debug) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_aregion 0 : { *(.debug_aregion) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+}
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/setvec.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/setvec.c
new file mode 100644
index 0000000000..bfaa31d9da
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/setvec.c
@@ -0,0 +1,43 @@
+/* set_vector
+ *
+ * This routine installs an interrupt vector on the target Board/CPU.
+ * This routine is allowed to be as board dependent as necessary.
+ *
+ * INPUT:
+ * handler - interrupt handler entry point
+ * vector - vector number
+ * type - 0 indicates raw hardware connect
+ * 1 indicates RTEMS interrupt connect
+ *
+ * RETURNS:
+ * address of previous interrupt handler
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.OARcorp.com/rtems/license.html.
+ *
+ * $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+rtems_isr_entry set_vector( /* returns old vector */
+ rtems_isr_entry handler, /* isr routine */
+ rtems_vector_number vector, /* vector number */
+ int type /* RTEMS or RAW intr */
+)
+{
+ rtems_isr_entry previous_isr;
+
+ if (type) {
+ rtems_interrupt_catch(handler, vector, (rtems_isr_entry *) &previous_isr );
+ } else {
+ /* XXX: install non-RTEMS ISR as "raw" interupt */
+ }
+ return previous_isr;
+}
+