powerpc/mpc55xx: BSP variant changes for MPC5643L

4 files changed, 22 insertions, 11 deletions

diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/get-system-clock.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/get-system-clock.c
index 5e0c608d41..bd4c769841 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/get-system-clock.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/get-system-clock.c
@@ -31,7 +31,7 @@ uint32_t mpc55xx_get_system_clock(void)
   #ifdef MPC55XX_HAS_FMPLL
     volatile struct FMPLL_tag *fmpll = &FMPLL;
     union FMPLL_SYNSR_tag synsr = { .R = fmpll->SYNSR.R };
-    uint32_t reference_clock = MPC55XX_FMPLL_REF_CLOCK;
+    uint32_t reference_clock = MPC55XX_REFERENCE_CLOCK;
     bool pll_clock_mode = synsr.B.MODE != 0;
     bool crystal_or_external_reference_mode = synsr.B.PLLSEL != 0;
 
@@ -54,7 +54,7 @@ uint32_t mpc55xx_get_system_clock(void)
   #ifdef MPC55XX_HAS_FMPLL_ENHANCED
     volatile struct FMPLL_tag *fmpll = &FMPLL;
     union FMPLL_ESYNCR1_tag esyncr1 = { .R = fmpll->ESYNCR1.R };
-    uint32_t reference_clock = MPC55XX_FMPLL_REF_CLOCK;
+    uint32_t reference_clock = MPC55XX_REFERENCE_CLOCK;
     bool normal_mode = (esyncr1.B.CLKCFG & 0x4U) != 0;
 
     if (normal_mode) {
@@ -73,7 +73,7 @@ uint32_t mpc55xx_get_system_clock(void)
   #ifdef MPC55XX_HAS_MODE_CONTROL
     /* FIXME: Assumes normal mode and external oscillator */
     PLLD_CR_32B_tag cr = { . R = CGM.FMPLL [0].CR.R };
-    uint32_t xosc = MPC55XX_FMPLL_REF_CLOCK;
+    uint32_t xosc = MPC55XX_REFERENCE_CLOCK;
     uint32_t ldf = cr.B.NDIV;
     uint32_t idf = cr.B.IDF + 1;
     uint32_t odf = 2U << cr.B.ODF;
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_dpu b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_dpu
new file mode 100644
index 0000000000..2f7d80716d
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_dpu
@@ -0,0 +1 @@
+INCLUDE linkcmds.mpc5643l_evb
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.xkt564levb b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_evb
index 98cc0bc78a..d0203be0d2 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.xkt564levb
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_evb
@@ -1,6 +1,6 @@
 MEMORY {
 	ROM : ORIGIN = 0x0, LENGTH = 1M
-	RAM_0 : ORIGIN = 0x40000000, LENGTH = 64K
+	RAM : ORIGIN = 0x40000000, LENGTH = 64K
 	RAM_1 : ORIGIN = 0x50000000, LENGTH = 64K
 	RAM_EXT : ORIGIN = 0x0, LENGTH = 0
 	NOCACHE : ORIGIN = 0x0, LENGTH = 0
@@ -12,18 +12,18 @@ bsp_ram_1_size = LENGTH (RAM_1);
 bsp_ram_1_end = bsp_ram_1_start + bsp_ram_1_size;
 
 REGION_ALIAS ("REGION_START", ROM);
-REGION_ALIAS ("REGION_FAST_TEXT", RAM_0);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM);
 REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM);
 REGION_ALIAS ("REGION_TEXT", ROM);
 REGION_ALIAS ("REGION_TEXT_LOAD", ROM);
 REGION_ALIAS ("REGION_RODATA", ROM);
 REGION_ALIAS ("REGION_RODATA_LOAD", ROM);
-REGION_ALIAS ("REGION_FAST_DATA", RAM_0);
+REGION_ALIAS ("REGION_FAST_DATA", RAM);
 REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM);
-REGION_ALIAS ("REGION_DATA", RAM_0);
+REGION_ALIAS ("REGION_DATA", RAM);
 REGION_ALIAS ("REGION_DATA_LOAD", ROM);
-REGION_ALIAS ("REGION_BSS", RAM_0);
-REGION_ALIAS ("REGION_RWEXTRA", RAM_0);
+REGION_ALIAS ("REGION_BSS", RAM);
+REGION_ALIAS ("REGION_RWEXTRA", RAM);
 REGION_ALIAS ("REGION_WORK", RAM_1);
 REGION_ALIAS ("REGION_STACK", RAM_1);
 REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-clock.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-clock.c
index 0b0d568d8b..af243191b7 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-clock.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-clock.c
@@ -47,7 +47,7 @@ BSP_START_TEXT_SECTION const mpc55xx_clock_config
   #ifdef MPC55XX_HAS_FMPLL_ENHANCED
     #define EPREDIV_VAL (MPC55XX_FMPLL_PREDIV-1)
     #define EMFD_VAL    (MPC55XX_FMPLL_MFD-16)
-    #define VCO_CLK_REF (MPC55XX_FMPLL_REF_CLOCK/(EPREDIV_VAL+1))
+    #define VCO_CLK_REF (MPC55XX_REFERENCE_CLOCK/(EPREDIV_VAL+1))
     #define VCO_CLK_OUT (VCO_CLK_REF*(EMFD_VAL+16))
     #define ERFD_VAL    ((VCO_CLK_OUT/MPC55XX_FMPLL_CLK_OUT)-1)
 
@@ -90,7 +90,13 @@ BSP_START_TEXT_SECTION const mpc55xx_clock_config
     .fmpll = {
       {
         .cr = {
-          .B = { .IDF = 3, .ODF = 1, .NDIV = 48, .I_LOCK = 1, .PLL_ON = 1 }
+          #if MPC55XX_REFERENCE_CLOCK == 8000000
+            .B = { .IDF = 0, .ODF = 1, .NDIV = 60, .I_LOCK = 1, .PLL_ON = 1 }
+          #elif MPC55XX_REFERENCE_CLOCK == 40000000
+            .B = { .IDF = 3, .ODF = 1, .NDIV = 48, .I_LOCK = 1, .PLL_ON = 1 }
+          #else
+            #error "unexpected reference clock"
+          #endif
         }
       },
       {
@@ -103,6 +109,10 @@ BSP_START_TEXT_SECTION const mpc55xx_clock_config
       .B = { .SELDIV = 2, .SELCTL = 2 }
     },
     .auxclk = {
+      [0] = {
+        .AC_SC = { .B = { .SELCTL = 4 } },
+        .AC_DC0_3 = { .B = { .DE0 = 1, .DIV0 = 0 } }
+      },
       [1] = {
         .AC_SC = { .B = { .SELCTL = 4 } },
         .AC_DC0_3 = { .B = { .DE0 = 1, .DIV0 = 11 } }