diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-04-24 11:21:46 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-04-24 14:35:15 +0200 |
| commit | 13a8b19eedb5b9cc931c88b6a5fe29a49c2853db (patch) | |
| tree | 77a981b5961afbb5a78a85ee32ac4eb37539f580 /c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c | |
| parent | score: Remove _Stack_Adjust_size() (diff) | |
| download | rtems-13a8b19eedb5b9cc931c88b6a5fe29a49c2853db.tar.bz2 | |
bsp/mpc55xxevb: Change early MMU settings
Add internal SRAM sections with cache enabled to early MMU settings.
The internal SRAM initialization will use the early MMU settings. This
allows applications to use cache inhibited areas in the internal SRAM.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c index d5df9ffbb4..dd79366455 100644 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c +++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c @@ -7,7 +7,7 @@ */ /* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Obere Lagerstr. 30 @@ -86,20 +86,20 @@ BSP_START_TEXT_SECTION const struct MMU_tag #elif defined(MPC55XX_BOARD_MPC5566EVB) /* Internal flash 3M */ MPC55XX_MMU_TAG_INITIALIZER(1, 0x00000000, MPC55XX_MMU_64K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(5, 0x00010000, MPC55XX_MMU_64K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(6, 0x00020000, MPC55XX_MMU_64K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(7, 0x00030000, MPC55XX_MMU_64K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(8, 0x00040000, MPC55XX_MMU_256K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(9, 0x00080000, MPC55XX_MMU_256K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(10, 0x000c0000, MPC55XX_MMU_256K, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(11, 0x00100000, MPC55XX_MMU_1M, 1, 0, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(12, 0x00200000, MPC55XX_MMU_1M, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(6, 0x00010000, MPC55XX_MMU_64K, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(7, 0x00020000, MPC55XX_MMU_64K, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(8, 0x00030000, MPC55XX_MMU_64K, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(9, 0x00040000, MPC55XX_MMU_256K, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(10, 0x00080000, MPC55XX_MMU_256K, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(11, 0x000c0000, MPC55XX_MMU_256K, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(12, 0x00100000, MPC55XX_MMU_1M, 1, 0, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(13, 0x00200000, MPC55XX_MMU_1M, 1, 0, 1, 0), /* External SRAM 512k */ MPC55XX_MMU_TAG_INITIALIZER(2, 0x20000000, MPC55XX_MMU_256K, 0, 1, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(13, 0x20040000, MPC55XX_MMU_256K, 0, 1, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(14, 0x20040000, MPC55XX_MMU_256K, 0, 1, 1, 0), /* Internal SRAM 128k */ - MPC55XX_MMU_TAG_INITIALIZER(3, 0x40010000, MPC55XX_MMU_64K, 0, 1, 1, 0), - MPC55XX_MMU_TAG_INITIALIZER(14, 0x40000000, MPC55XX_MMU_64K, 0, 1, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_64K, 0, 1, 1, 0), + MPC55XX_MMU_TAG_INITIALIZER(5, 0x40010000, MPC55XX_MMU_64K, 0, 1, 1, 0), /* External Ethernet Controller 64k */ MPC55XX_MMU_TAG_INITIALIZER(15, 0x3fff8000, MPC55XX_MMU_64K, 0, 1, 1, 1) #elif defined(MPC55XX_BOARD_MPC5674FEVB) |