2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* clock/clock-config.c: Fixes to pass psnsext01.
	* startup/bspstart.c: Workaround for GCC 4.6 bug.
	* include/smsc9218i.h, network/smsc9218i.c, Makefile.am: Changes
	throughout.

1 files changed, 37 insertions, 156 deletions

diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h
index 294aefcb89..d5473ed30a 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h
@@ -189,62 +189,32 @@ volatile smsc9218i_registers *const smsc9218i = (volatile smsc9218i_registers *)
 /** @} */
 
 /**
- * @name Interrupt Status
- * @{
- */
-
-#define SMSC9218I_INT_STS_SW SMSC9218I_FLAG(31)
-#define SMSC9218I_INT_STS_TXSTOP SMSC9218I_FLAG(25)
-#define SMSC9218I_INT_STS_RXSTOP SMSC9218I_FLAG(24)
-#define SMSC9218I_INT_STS_RXDFH SMSC9218I_FLAG(23)
-#define SMSC9218I_INT_STS_TIOC SMSC9218I_FLAG(21)
-#define SMSC9218I_INT_STS_RXD SMSC9218I_FLAG(20)
-#define SMSC9218I_INT_STS_GPT SMSC9218I_FLAG(19)
-#define SMSC9218I_INT_STS_PHY SMSC9218I_FLAG(18)
-#define SMSC9218I_INT_STS_PME SMSC9218I_FLAG(17)
-#define SMSC9218I_INT_STS_TXSO SMSC9218I_FLAG(16)
-#define SMSC9218I_INT_STS_RWT SMSC9218I_FLAG(15)
-#define SMSC9218I_INT_STS_RXE SMSC9218I_FLAG(14)
-#define SMSC9218I_INT_STS_TXE SMSC9218I_FLAG(13)
-#define SMSC9218I_INT_STS_TDFO SMSC9218I_FLAG(10)
-#define SMSC9218I_INT_STS_TDFA SMSC9218I_FLAG(9)
-#define SMSC9218I_INT_STS_TSFF SMSC9218I_FLAG(8)
-#define SMSC9218I_INT_STS_TSFL SMSC9218I_FLAG(7)
-#define SMSC9218I_INT_STS_RSFF SMSC9218I_FLAG(4)
-#define SMSC9218I_INT_STS_RSFL SMSC9218I_FLAG(3)
-#define SMSC9218I_INT_STS_GPIO2 SMSC9218I_FLAG(2)
-#define SMSC9218I_INT_STS_GPIO1 SMSC9218I_FLAG(1)
-#define SMSC9218I_INT_STS_GPIO0 SMSC9218I_FLAG(0)
-
-/** @} */
-
-/**
- * @name Interrupt Enable
- * @{
- */
-
-#define SMSC9218I_INT_EN_SW SMSC9218I_FLAG(31)
-#define SMSC9218I_INT_EN_TXSTOP SMSC9218I_FLAG(25)
-#define SMSC9218I_INT_EN_RXSTOP SMSC9218I_FLAG(24)
-#define SMSC9218I_INT_EN_RXDFH SMSC9218I_FLAG(23)
-#define SMSC9218I_INT_EN_TIOC SMSC9218I_FLAG(21)
-#define SMSC9218I_INT_EN_RXD SMSC9218I_FLAG(20)
-#define SMSC9218I_INT_EN_GPT SMSC9218I_FLAG(19)
-#define SMSC9218I_INT_EN_PHY SMSC9218I_FLAG(18)
-#define SMSC9218I_INT_EN_PME SMSC9218I_FLAG(17)
-#define SMSC9218I_INT_EN_TXSO SMSC9218I_FLAG(16)
-#define SMSC9218I_INT_EN_RWT SMSC9218I_FLAG(15)
-#define SMSC9218I_INT_EN_RXE SMSC9218I_FLAG(14)
-#define SMSC9218I_INT_EN_TXE SMSC9218I_FLAG(13)
-#define SMSC9218I_INT_EN_TDFO SMSC9218I_FLAG(10)
-#define SMSC9218I_INT_EN_TDFA SMSC9218I_FLAG(9)
-#define SMSC9218I_INT_EN_TSFF SMSC9218I_FLAG(8)
-#define SMSC9218I_INT_EN_TSFL SMSC9218I_FLAG(7)
-#define SMSC9218I_INT_EN_RSFF SMSC9218I_FLAG(4)
-#define SMSC9218I_INT_EN_RSFL SMSC9218I_FLAG(3)
-#define SMSC9218I_INT_EN_GPIO2 SMSC9218I_FLAG(2)
-#define SMSC9218I_INT_EN_GPIO1 SMSC9218I_FLAG(1)
-#define SMSC9218I_INT_EN_GPIO0 SMSC9218I_FLAG(0)
+ * @name Interrupt Enable and Status
+ * @{
+ */
+
+#define SMSC9218I_INT_SW SMSC9218I_FLAG(31)
+#define SMSC9218I_INT_TXSTOP SMSC9218I_FLAG(25)
+#define SMSC9218I_INT_RXSTOP SMSC9218I_FLAG(24)
+#define SMSC9218I_INT_RXDFH SMSC9218I_FLAG(23)
+#define SMSC9218I_INT_TIOC SMSC9218I_FLAG(21)
+#define SMSC9218I_INT_RXD SMSC9218I_FLAG(20)
+#define SMSC9218I_INT_GPT SMSC9218I_FLAG(19)
+#define SMSC9218I_INT_PHY SMSC9218I_FLAG(18)
+#define SMSC9218I_INT_PME SMSC9218I_FLAG(17)
+#define SMSC9218I_INT_TXSO SMSC9218I_FLAG(16)
+#define SMSC9218I_INT_RWT SMSC9218I_FLAG(15)
+#define SMSC9218I_INT_RXE SMSC9218I_FLAG(14)
+#define SMSC9218I_INT_TXE SMSC9218I_FLAG(13)
+#define SMSC9218I_INT_TDFO SMSC9218I_FLAG(10)
+#define SMSC9218I_INT_TDFA SMSC9218I_FLAG(9)
+#define SMSC9218I_INT_TSFF SMSC9218I_FLAG(8)
+#define SMSC9218I_INT_TSFL SMSC9218I_FLAG(7)
+#define SMSC9218I_INT_RSFF SMSC9218I_FLAG(4)
+#define SMSC9218I_INT_RSFL SMSC9218I_FLAG(3)
+#define SMSC9218I_INT_GPIO2 SMSC9218I_FLAG(2)
+#define SMSC9218I_INT_GPIO1 SMSC9218I_FLAG(1)
+#define SMSC9218I_INT_GPIO0 SMSC9218I_FLAG(0)
 
 /** @} */
 
@@ -439,6 +409,15 @@ volatile smsc9218i_registers *const smsc9218i = (volatile smsc9218i_registers *)
 /** @} */
 
 /**
+ * @name EEPROM Command Register
+ * @{
+ */
+
+#define SMSC9218I_E2P_CMD_EPC_BUSY SMSC9218I_FLAG(31)
+
+/** @} */
+
+/**
  * @name MAC Control and Status Synchronizer Command
  * @{
  */
@@ -599,51 +578,11 @@ volatile smsc9218i_registers *const smsc9218i = (volatile smsc9218i_registers *)
 /** @} */
 
 /**
- * @name Basic Control
- * @{
- */
-
-#define SMSC9218I_PHY_BCR 0x00000000U
-#define SMSC9218I_PHY_BCR_RST 0x00008000U
-#define SMSC9218I_PHY_BCR_LOOPBK 0x00004000U
-#define SMSC9218I_PHY_BCR_SS 0x00002000U
-#define SMSC9218I_PHY_BCR_ANE 0x00001000U
-#define SMSC9218I_PHY_BCR_PWRDN 0x00000800U
-#define SMSC9218I_PHY_BCR_RSTAN 0x00000200U
-#define SMSC9218I_PHY_BCR_FDPLX 0x00000100U
-#define SMSC9218I_PHY_BCR_COLLTST 0x00000080U
-
-/** @} */
-
-/**
- * @name Basic Status
- * @{
- */
-
-#define SMSC9218I_PHY_BSR 0x00000001U
-#define SMSC9218I_PHY_BSR_100_T4_ABLE 0x00008000U
-#define SMSC9218I_PHY_BSR_100_TX_FDPLX 0x00004000U
-#define SMSC9218I_PHY_BSR_100_TX_HDPLX 0x00002000U
-#define SMSC9218I_PHY_BSR_10_FDPLX 0x00001000U
-#define SMSC9218I_PHY_BSR_10_HDPLX 0x00000800U
-#define SMSC9218I_PHY_BSR_ANC 0x00000020U
-#define SMSC9218I_PHY_BSR_REM_FAULT 0x00000010U
-#define SMSC9218I_PHY_BSR_AN_ABLE 0x00000008U
-#define SMSC9218I_PHY_BSR_LINK_STATUS 0x00000004U
-#define SMSC9218I_PHY_BSR_JAB_DET 0x00000002U
-#define SMSC9218I_PHY_BSR_EXT_CAP 0x00000001U
-
-/** @} */
-
-/**
  * @name PHY Identifier 1
  * @{
  */
 
-#define SMSC9218I_PHY_ID1 0x00000002U
-#define SMSC9218I_PHY_ID1_MASK 0x0000ffffU
-#define SMSC9218I_PHY_ID1_LAN9118 0x00000007U
-#define SMSC9218I_PHY_ID1_LAN9218 (PHY_ID1_LAN9118)
+#define SMSC9218I_PHY_ID1_LAN9118 0x7
 
 /** @} */
 
@@ -652,65 +591,7 @@ volatile smsc9218i_registers *const smsc9218i = (volatile smsc9218i_registers *)
  * @{
  */
 
-#define SMSC9218I_PHY_ID2 0x00000003U
-#define SMSC9218I_PHY_ID2_MASK 0x0000ffffU
-#define SMSC9218I_PHY_ID2_MODEL_MASK 0x000003f0U
-#define SMSC9218I_PHY_ID2_REV_MASK 0x0000000fU
-#define SMSC9218I_PHY_ID2_LAN9118 0x0000c0d1U
-#define SMSC9218I_PHY_ID2_LAN9218 0x0000c0c3U
-
-/** @} */
-
-/**
- * @name Auto-negotiation Advertisment
- * @{
- */
-
-#define SMSC9218I_PHY_ANAR 0x00000004U
-#define SMSC9218I_PHY_ANAR_NXTPG_CAP 0x00008000U
-#define SMSC9218I_PHY_ANAR_REM_FAULT 0x00002000U
-#define SMSC9218I_PHY_ANAR_PAUSE_OP_MASK 0x00000c00U
-#define SMSC9218I_PHY_ANAR_PAUSE_OP_NONE 0x00000000U
-#define SMSC9218I_PHY_ANAR_PAUSE_OP_ASLP 0x00000400U
-#define SMSC9218I_PHY_ANAR_PAUSE_OP_SLP 0x00000800U
-#define SMSC9218I_PHY_ANAR_PAUSE_OP_BOTH 0x00000c00U
-#define SMSC9218I_PHY_ANAR_100_T4_ABLE 0x00000200U
-#define SMSC9218I_PHY_ANAR_100_TX_FDPLX 0x00000100U
-#define SMSC9218I_PHY_ANAR_100_TX_ABLE 0x00000080U
-#define SMSC9218I_PHY_ANAR_10_FDPLX 0x00000040U
-#define SMSC9218I_PHY_ANAR_10_ABLE 0x00000020U
-
-/** @} */
-
-/**
- * @name Auto-negotiation Link Partner Ability
- * @{
- */
-
-#define SMSC9218I_PHY_ANLPAR 0x00000005U
-#define SMSC9218I_PHY_ANLPAR_NXTPG_CAP 0x00008000U
-#define SMSC9218I_PHY_ANLPAR_ACK 0x00004000U
-#define SMSC9218I_PHY_ANLPAR_REM_FAULT 0x00002000U
-#define SMSC9218I_PHY_ANLPAR_PAUSE_CAP 0x00000400U
-#define SMSC9218I_PHY_ANLPAR_100_T4_ABLE 0x00000200U
-#define SMSC9218I_PHY_ANLPAR_100_TX_FDPLX 0x00000100U
-#define SMSC9218I_PHY_ANLPAR_100_TX_ABLE 0x00000080U
-#define SMSC9218I_PHY_ANLPAR_10_FDPLX 0x00000040U
-#define SMSC9218I_PHY_ANLPAR_10_ABLE 0x00000020U
-
-/** @} */
-
-/**
- * @name Auto-negotiation Expansion
- * @{
- */
-
-#define SMSC9218I_PHY_ANEXPR 0x00000006U
-#define SMSC9218I_PHY_ANEXPR_PARDET_FAULT 0x00000010U
-#define SMSC9218I_PHY_ANEXPR_LP_NXTPG_CAP 0x00000008U
-#define SMSC9218I_PHY_ANEXPR_NXTPG_CAP 0x00000004U
-#define SMSC9218I_PHY_ANEXPR_NEWPG_REC 0x00000002U
-#define SMSC9218I_PHY_ANEXPR_LP_AN_ABLE 0x00000001U
+#define SMSC9218I_PHY_ID2_LAN9218 0xc0c3
 
 /** @} */