diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2005-09-12 13:32:58 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2005-09-12 13:32:58 +0000 |
| commit | 848e900c5c47fc0dbc24d2e093e3a6a3fa76202c (patch) | |
| tree | b2b04382402f61e38f80be1fa156de6f010c79de /c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c | |
| parent | 2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de> (diff) | |
| download | rtems-848e900c5c47fc0dbc24d2e093e3a6a3fa76202c.tar.bz2 | |
2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
PR 822/bsps
* console/console.c, startup/bspstart.c, startup/imbx8xx.c,
startup/mmutlbtab.c, startup/start.S, vectors/vectors_init.c:
Currently the MBX8xx BSP does not boot, because some logical errors
are in the startup code. Additionally, the mpc8xx shared clock driver
does not support the clocking scheme of some of the board variants,
which are clocked from a 32768Hz (!) external crystal.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c index 47b34f3e12..608e622391 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c @@ -31,19 +31,8 @@ * location is equal to its real address. */ MMU_TLB_table_t MMU_TLB_table[] = { -#if ( defined(mbx860_001b) ) - /* - * DRAM: CS1, Start address 0x00000000, 2M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, - * R/W,X for all, no ASID comparison, not cache-inhibited. - * Last 512K block is cache-inhibited, but not guarded for use by EPPCBug. - * EPN TWC RPN - */ - { 0x00000200, 0x05, 0x000009FD }, /* DRAM - PS=512K */ - { 0x00080200, 0x05, 0x000809FD }, /* DRAM - PS=512K */ - { 0x00100200, 0x05, 0x001009FD }, /* DRAM - PS=512K */ - { 0x00180200, 0x05, 0x001809FF }, /* DRAM - PS=512K, cache-inhibited */ -#elif ( defined(mbx860_002b) || \ +#if ( defined(mbx860_001b) || \ + defined(mbx860_002b) || \ defined(mbx860_003b) || \ defined(mbx821_001b) || \ defined(mbx821_002b) || \ |