summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/powerpc/mbx8xx/irq
diff options
context:
space:
mode:
authorJoel Sherrill <joel@rtems.org>2016-01-23 16:49:29 -0600
committerJoel Sherrill <joel@rtems.org>2016-01-23 16:49:29 -0600
commit2dca2e62414b32cb59218ca689b990d0864403f0 (patch)
treedc580256a1c88b162eeed36891ef419635aeac2f /c/src/lib/libbsp/powerpc/mbx8xx/irq
parentObsolete and remove m68k/ods68302 BSP (diff)
downloadrtems-2dca2e62414b32cb59218ca689b990d0864403f0.tar.bz2
Obsolete and remove powerpc/mbx8xx
closes #2545.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mbx8xx/irq')
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c347
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h184
2 files changed, 0 insertions, 531 deletions
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
deleted file mode 100644
index 58bd045330..0000000000
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- *
- * This file contains the implementation of the function described in irq.h
- *
- * Copyright (c) 2009 embedded brains GmbH.
- *
- * Copyright (C) 1998, 1999 valette@crf.canon.fr
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems/system.h>
-#include <bsp.h>
-#include <bsp/irq.h>
-#include <bsp/irq-generic.h>
-#include <bsp/vectors.h>
-#include <bsp/8xx_immap.h>
-#include <bsp/mbx.h>
-#include <bsp/commproc.h>
-
-volatile unsigned int ppc_cached_irq_mask;
-
-/*
- * Check if symbolic IRQ name is an SIU IRQ
- */
-static inline int is_siu_irq(const rtems_irq_number irqLine)
-{
- return (((int) irqLine <= BSP_SIU_IRQ_MAX_OFFSET) &
- ((int) irqLine >= BSP_SIU_IRQ_LOWEST_OFFSET)
- );
-}
-
-/*
- * Check if symbolic IRQ name is an CPM IRQ
- */
-static inline int is_cpm_irq(const rtems_irq_number irqLine)
-{
- return (((int) irqLine <= BSP_CPM_IRQ_MAX_OFFSET) &
- ((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
- );
-}
-
-/*
- * masks used to mask off the interrupts. For exmaple, for ILVL2, the
- * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7
- * and ILVL7.
- *
- */
-const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] =
-{
- /* IRQ0 ILVL0 IRQ1 ILVL1 */
- 0x00000000, 0x80000000, 0xC0000000, 0xE0000000,
-
- /* IRQ2 ILVL2 IRQ3 ILVL3 */
- 0xF0000000, 0xF8000000, 0xFC000000, 0xFE000000,
-
- /* IRQ4 ILVL4 IRQ5 ILVL5 */
- 0xFF000000, 0xFF800000, 0xFFC00000, 0xFFE00000,
-
- /* IRQ6 ILVL6 IRQ7 ILVL7 */
- 0xFFF00000, 0xFFF80000, 0xFFFC0000, 0xFFFE0000
-};
-
-static int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
-{
- int cpm_irq_index;
-
- if (!is_cpm_irq(irqLine))
- return 1;
-
- cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << cpm_irq_index);
-
- return 0;
-}
-
-static int BSP_irq_disable_at_cpm(const rtems_irq_number irqLine)
-{
- int cpm_irq_index;
-
- if (!is_cpm_irq(irqLine))
- return 1;
-
- cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_irq_index);
-
- return 0;
-}
-
-int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine)
-{
- int cpm_irq_index;
-
- if (!is_cpm_irq(irqLine))
- return 0;
-
- cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
- return (((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr & (1 << cpm_irq_index));
-}
-
-int BSP_irq_enable_at_siu(const rtems_irq_number irqLine)
-{
- int siu_irq_index;
-
- if (!is_siu_irq(irqLine))
- return 1;
-
- siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET);
- ppc_cached_irq_mask |= (1 << (31-siu_irq_index));
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
-
- return 0;
-}
-
-int BSP_irq_disable_at_siu(const rtems_irq_number irqLine)
-{
- int siu_irq_index;
-
- if (!is_siu_irq(irqLine))
- return 1;
-
- siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET);
- ppc_cached_irq_mask &= ~(1 << (31-siu_irq_index));
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
-
- return 0;
-}
-
-int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine)
-{
- int siu_irq_index;
-
- if (!is_siu_irq(irqLine))
- return 0;
-
- siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET);
- return ppc_cached_irq_mask & (1 << (31-siu_irq_index));
-}
-
-#ifdef DISPATCH_HANDLER_STAT
-volatile unsigned int maxLoop = 0;
-#endif
-
-/*
- * High level IRQ handler called from shared_raw_irq_code_entry
- */
-static int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
-{
- register unsigned int irq;
- register unsigned cpmIntr; /* boolean */
- register unsigned oldMask; /* old siu pic masks */
- register unsigned msr;
- register unsigned new_msr;
-#ifdef DISPATCH_HANDLER_STAT
- unsigned loopCounter;
-#endif
- /*
- * Handle decrementer interrupt
- */
- if (excNum == ASM_DEC_VECTOR) {
- _CPU_MSR_GET(msr);
- new_msr = msr | MSR_EE;
- _CPU_MSR_SET(new_msr);
-
- bsp_interrupt_handler_dispatch(BSP_DECREMENTER);
-
- _CPU_MSR_SET(msr);
- return 0;
- }
- /*
- * Handle external interrupt generated by SIU on PPC core
- */
-#ifdef DISPATCH_HANDLER_STAT
- loopCounter = 0;
-#endif
- while (1) {
- if ((ppc_cached_irq_mask & ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend) == 0) {
-#ifdef DISPATCH_HANDLER_STAT
- if (loopCounter > maxLoop) maxLoop = loopCounter;
-#endif
- break;
- }
- irq = (((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26);
- cpmIntr = (irq == BSP_CPM_INTERRUPT);
- /*
- * Disable the interrupt of the same and lower priority.
- */
- oldMask = ppc_cached_irq_mask;
- ppc_cached_irq_mask = oldMask & SIU_IvectMask[irq];
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
- /*
- * Acknowledge current interrupt. This has no effect on internal level interrupt.
- */
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = (1 << (31 - irq));
-
- if (cpmIntr) {
- /*
- * We will reenable the SIU CPM interrupt to allow nesting of CPM interrupt.
- * We must before acknowledege the current irq at CPM level to avoid trigerring
- * the interrupt again.
- */
- /*
- * Acknowledge and get the vector.
- */
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1;
- irq = (((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr >> 11);
- /*
- * transform IRQ to normalized irq table index.
- */
- irq += BSP_CPM_IRQ_LOWEST_OFFSET;
- /*
- * Unmask CPM interrupt at SIU level
- */
- ppc_cached_irq_mask |= (1 << (31 - BSP_CPM_INTERRUPT));
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
- }
- /*
- * make sure, that the masking operations in
- * ICTL and MSR are executed in order
- */
- __asm__ volatile("sync":::"memory");
-
- _CPU_MSR_GET(msr);
- new_msr = msr | MSR_EE;
- _CPU_MSR_SET(new_msr);
-
- bsp_interrupt_handler_dispatch(irq);
-
- _CPU_MSR_SET(msr);
-
- /*
- * make sure, that the masking operations in
- * ICTL and MSR are executed in order
- */
- __asm__ volatile("sync":::"memory");
-
- if (cpmIntr) {
- irq -= BSP_CPM_IRQ_LOWEST_OFFSET;
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr = (1 << irq);
- }
- ppc_cached_irq_mask = oldMask;
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
-#ifdef DISPATCH_HANDLER_STAT
- ++ loopCounter;
-#endif
- }
- return 0;
-}
-
-static void BSP_SIU_irq_init(void)
-{
- /*
- * In theory we should initialize two registers at least :
- * SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But
- * we should take care that a monitor may have restoreed to another value.
- * If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT
- * please feel free to add it here.
- */
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0;
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000;
- ppc_cached_irq_mask = 0;
- ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
-}
-
-/*
- * Initialize CPM interrupt management
- */
-static void
-BSP_CPM_irq_init(void)
-{
- /*
- * Initialize the CPM interrupt controller.
- */
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
-#ifdef mpc860
- (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-#else
- (CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-#endif
- ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
-
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
-}
-
-rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
-{
- if (is_cpm_irq(irqnum)) {
- /*
- * Enable interrupt at PIC level
- */
- BSP_irq_enable_at_cpm (irqnum);
- }
-
- if (is_siu_irq(irqnum)) {
- /*
- * Enable interrupt at SIU level
- */
- BSP_irq_enable_at_siu (irqnum);
- }
-
- return RTEMS_SUCCESSFUL;
-}
-
-rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
-{
- if (is_cpm_irq(irqnum)) {
- /*
- * disable interrupt at PIC level
- */
- BSP_irq_disable_at_cpm (irqnum);
- }
- if (is_siu_irq(irqnum)) {
- /*
- * disable interrupt at OPENPIC level
- */
- BSP_irq_disable_at_siu (irqnum);
- }
-
- return RTEMS_SUCCESSFUL;
-}
-
-rtems_status_code bsp_interrupt_facility_initialize()
-{
- /* Install exception handler */
- if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
- return RTEMS_IO_ERROR;
- }
- if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
- return RTEMS_IO_ERROR;
- }
-
- /* Initialize the interrupt controller */
- BSP_SIU_irq_init();
- BSP_CPM_irq_init();
-
- /*
- * Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
- * set up in BSP_CPM_irq_init.
- */
- ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
- BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
-
- return RTEMS_SUCCESSFUL;
-}
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h
deleted file mode 100644
index b79ea96690..0000000000
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h
+++ /dev/null
@@ -1,184 +0,0 @@
-/* irq.h
- *
- * This include file describe the data structure and the functions implemented
- * by rtems to write interrupt handlers.
- *
- * CopyRight (C) 1999 valette@crf.canon.fr
- *
- * This code is heavilly inspired by the public specification of STREAM V2
- * that can be found at :
- *
- * <http://www.chorus.com/Documentation/index.html> by following
- * the STREAM API Specification Document link.
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
-#define LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
-
-#include <rtems/irq.h>
-
-#ifndef ASM
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-extern volatile unsigned int ppc_cached_irq_mask;
-
-/*
- * Symblolic IRQ names and related definitions.
- */
-
- /*
- * SIU IRQ handler related definitions
- */
-#define BSP_SIU_IRQ_NUMBER 16 /* 16 reserved but in the future... */
-#define BSP_SIU_IRQ_LOWEST_OFFSET 0
-#define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER - 1)
- /*
- * CPM IRQ handlers related definitions
- * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
- */
-#define BSP_CPM_IRQ_NUMBER 32
-#define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_NUMBER + BSP_SIU_IRQ_LOWEST_OFFSET)
-#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1)
- /*
- * PowerPc exceptions handled as interrupt where a rtems managed interrupt
- * handler might be connected
- */
-#define BSP_PROCESSOR_IRQ_NUMBER 1
-#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1)
-#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
- /*
- * Summary
- */
-#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
-#define BSP_LOWEST_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET)
-#define BSP_MAX_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET)
- /*
- * Some SIU IRQ symbolic name definition. Please note that
- * INT IRQ are defined but a single one will be used to
- * redirect all CPM interrupt.
- */
-#define BSP_SIU_EXT_IRQ_0 0
-#define BSP_SIU_INT_IRQ_0 1
-
-#define BSP_SIU_EXT_IRQ_1 2
-#define BSP_SIU_INT_IRQ_1 3
-
-#define BSP_SIU_EXT_IRQ_2 4
-#define BSP_SIU_INT_IRQ_2 5
-
-#define BSP_SIU_EXT_IRQ_3 6
-#define BSP_SIU_INT_IRQ_3 7
-
-#define BSP_SIU_EXT_IRQ_4 8
-#define BSP_SIU_INT_IRQ_4 9
-
-#define BSP_SIU_EXT_IRQ_5 10
-#define BSP_SIU_INT_IRQ_5 11
-
-#define BSP_SIU_EXT_IRQ_6 12
-#define BSP_SIU_INT_IRQ_6 13
-
-#define BSP_SIU_EXT_IRQ_7 14
-#define BSP_SIU_INT_IRQ_7 15
- /*
- * Symbolic name for CPM interrupt on SIU Internal level 2
- */
-#define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2
-#define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6
-#define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3
- /*
- * Some CPM IRQ symbolic name definition
- */
-#define BSP_CPM_IRQ_ERROR BSP_CPM_IRQ_LOWEST_OFFSET
-#define BSP_CPM_IRQ_PARALLEL_IO_PC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 1)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC5 (BSP_CPM_IRQ_LOWEST_OFFSET + 2)
-#define BSP_CPM_IRQ_SMC2_OR_PIP (BSP_CPM_IRQ_LOWEST_OFFSET + 3)
-#define BSP_CPM_IRQ_SMC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 4)
-#define BSP_CPM_IRQ_SPI (BSP_CPM_IRQ_LOWEST_OFFSET + 5)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC6 (BSP_CPM_IRQ_LOWEST_OFFSET + 6)
-#define BSP_CPM_IRQ_TIMER_4 (BSP_CPM_IRQ_LOWEST_OFFSET + 7)
-
-#define BSP_CPM_IRQ_PARALLEL_IO_PC7 (BSP_CPM_IRQ_LOWEST_OFFSET + 9)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC8 (BSP_CPM_IRQ_LOWEST_OFFSET + 10)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC9 (BSP_CPM_IRQ_LOWEST_OFFSET + 11)
-#define BSP_CPM_IRQ_TIMER_3 (BSP_CPM_IRQ_LOWEST_OFFSET + 12)
-
-#define BSP_CPM_IRQ_PARALLEL_IO_PC10 (BSP_CPM_IRQ_LOWEST_OFFSET + 14)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC11 (BSP_CPM_IRQ_LOWEST_OFFSET + 15)
-#define BSP_CPM_I2C (BSP_CPM_IRQ_LOWEST_OFFSET + 16)
-#define BSP_CPM_RISC_TIMER_TABLE (BSP_CPM_IRQ_LOWEST_OFFSET + 17)
-#define BSP_CPM_IRQ_TIMER_2 (BSP_CPM_IRQ_LOWEST_OFFSET + 18)
-
-#define BSP_CPM_IDMA2 (BSP_CPM_IRQ_LOWEST_OFFSET + 20)
-#define BSP_CPM_IDMA1 (BSP_CPM_IRQ_LOWEST_OFFSET + 21)
-#define BSP_CPM_SDMA_CHANNEL_BUS_ERR (BSP_CPM_IRQ_LOWEST_OFFSET + 22)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC12 (BSP_CPM_IRQ_LOWEST_OFFSET + 23)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC13 (BSP_CPM_IRQ_LOWEST_OFFSET + 24)
-#define BSP_CPM_IRQ_TIMER_1 (BSP_CPM_IRQ_LOWEST_OFFSET + 25)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC14 (BSP_CPM_IRQ_LOWEST_OFFSET + 26)
-#define BSP_CPM_IRQ_SCC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 27)
-#define BSP_CPM_IRQ_SCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 28)
-#define BSP_CPM_IRQ_SCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 29)
-#define BSP_CPM_IRQ_SCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 30)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC15 (BSP_CPM_IRQ_LOWEST_OFFSET + 31)
- /*
- * Some Processor exception handled as rtems IRQ symbolic name definition
- */
-#define BSP_DECREMENTER BSP_PROCESSOR_IRQ_LOWEST_OFFSET
-
-#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET
-
-#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET
-
-#define CPM_INTERRUPT
-
-/*-------------------------------------------------------------------------+
-| Function Prototypes.
-+--------------------------------------------------------------------------*/
-/*
- * ------------------------ PPC SIU Mngt Routines -------
- */
-
-/*
- * function to disable a particular irq at 8259 level. After calling
- * this function, even if the device asserts the interrupt line it will
- * not be propagated further to the processor
- */
-int BSP_irq_disable_at_siu (const rtems_irq_number irqLine);
-/*
- * function to enable a particular irq at 8259 level. After calling
- * this function, if the device asserts the interrupt line it will
- * be propagated further to the processor
- */
-int BSP_irq_enable_at_siu (const rtems_irq_number irqLine);
-/*
- * function to acknoledge a particular irq at 8259 level. After calling
- * this function, if a device asserts an enabled interrupt line it will
- * be propagated further to the processor. Mainly usefull for people
- * writting raw handlers as this is automagically done for rtems managed
- * handlers.
- */
-int BSP_irq_ack_at_siu (const rtems_irq_number irqLine);
-/*
- * function to check if a particular irq is enabled at 8259 level. After calling
- */
-int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine);
-
-extern void BSP_rtems_irq_mng_init(unsigned cpuId);
-
-extern int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif