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authorSebastian Huber <sebastian.huber@embedded-brains.de>2012-04-02 11:06:34 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2012-04-02 11:40:31 +0200
commit1bb72a9487b65a39015288c978f25fb4c65efdfc (patch)
tree5c6bee9749d58fedc6a2d7da5691e4f80cea8c7e /c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
parentbsp/gen83xx: Support for MPC830X (diff)
downloadrtems-1bb72a9487b65a39015288c978f25fb4c65efdfc.tar.bz2
bsp/gen83xx: Support cache BSP options
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c')
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
index 9a42c50e4b..3a9772d165 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
@@ -96,11 +96,11 @@ void bsp_start( void)
* Enable instruction and data caches. Do not force writethrough mode.
*/
-#if BSP_INSTRUCTION_CACHE_ENABLED
+#ifdef BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction();
#endif
-#if BSP_DATA_CACHE_ENABLED
+#ifdef BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data();
#endif
@@ -130,6 +130,9 @@ void bsp_start( void)
}
/* Initialize exception handler */
+#ifndef BSP_DATA_CACHE_ENABLED
+ ppc_exc_cache_wb_check = 0;
+#endif
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,