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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-06-12 15:27:17 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-06-12 15:31:37 +0200 |
| commit | fd153c73bd2fbf8d5997ef225009f3388a916649 (patch) | |
| tree | a66e63c67fb47d413d662d05f1f12541b4ba22ed /c/src/lib/libbsp/powerpc/gen5200 | |
| parent | libchip/ata: Fix pre-processor symbol evaluation (diff) | |
| download | rtems-fd153c73bd2fbf8d5997ef225009f3388a916649.tar.bz2 | |
bsps: Replace NIRVANA region
Replace the "NIRVANA" region with the more verbose "UNEXPECTED_SECTIONS"
region. Move the region definition into the "linkcmds.base" files.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen5200')
6 files changed, 11 insertions, 9 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base index 5458000ea2..4510df1668 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base @@ -26,6 +26,10 @@ RamBase = bsp_ram_start; RamSize = bsp_ram_size; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; +MEMORY { + UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0 +} + SECTIONS { /* * BSP: MPC5200 registers @@ -320,9 +324,12 @@ SECTIONS { } /* - * BSP: Catch all unknown sections + * This is a RTEMS specific section to catch all unexpected input + * sections. In case you get an error like + * "section `.unexpected_sections' will not fit in region + * `UNEXPECTED_SECTIONS'" + * you have to figure out the offending input section and add it to the + * appropriate output section definition above. */ - .nirvana : { - *(*) - } > NIRVANA + .unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS } diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l index 40e57cae43..944cc36f4d 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l @@ -10,7 +10,6 @@ MEMORY { ROM : ORIGIN = 0xffe00000, LENGTH = 2M DPRAM : ORIGIN = 0xff000000, LENGTH = 1k REGS : ORIGIN = 0xf0000000, LENGTH = 64k - NIRVANA : ORIGIN = 0x0, LENGTH = 0 } INCLUDE linkcmds.base diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.dp2 b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.dp2 index 0aafdd7072..398919ae8c 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.dp2 +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.dp2 @@ -10,7 +10,6 @@ MEMORY { ROM : ORIGIN = 0xffe00000, LENGTH = 2M REGS : ORIGIN = 0xf0000000, LENGTH = 64k DPRAM : ORIGIN = 0x0, LENGTH = 0 - NIRVANA : ORIGIN = 0x0, LENGTH = 0 } INCLUDE linkcmds.base diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.icecube b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.icecube index dc47f1b615..17c707fb49 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.icecube +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.icecube @@ -10,7 +10,6 @@ MEMORY { ROM : ORIGIN = 0xffe00000, LENGTH = 2M REGS : ORIGIN = 0xf0000000, LENGTH = 64k DPRAM : ORIGIN = 0x0, LENGTH = 0 - NIRVANA : ORIGIN = 0x0, LENGTH = 0 } INCLUDE linkcmds.base diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_cr825 b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_cr825 index 83c2596fc4..55b987695c 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_cr825 +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_cr825 @@ -10,7 +10,6 @@ MEMORY { ROM : ORIGIN = 0xffe00000, LENGTH = 2M REGS : ORIGIN = 0xf0000000, LENGTH = 64k DPRAM : ORIGIN = 0xff000000, LENGTH = 1k - NIRVANA : ORIGIN = 0x0, LENGTH = 0 } INCLUDE linkcmds.base diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_ze30 b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_ze30 index 83c2596fc4..55b987695c 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_ze30 +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_ze30 @@ -10,7 +10,6 @@ MEMORY { ROM : ORIGIN = 0xffe00000, LENGTH = 2M REGS : ORIGIN = 0xf0000000, LENGTH = 64k DPRAM : ORIGIN = 0xff000000, LENGTH = 1k - NIRVANA : ORIGIN = 0x0, LENGTH = 0 } INCLUDE linkcmds.base |