summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/powerpc/gen5200
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-04-19 12:50:10 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-04-23 09:59:56 +0200
commit5e920ceb0e3cef8df2dce49a2b11d5fbd72f79b3 (patch)
tree82e9e236f90542c0b98f794d556b286ea1d474e8 /c/src/lib/libbsp/powerpc/gen5200
parentbsp/mpc5200: Add and use enable_bat_4_to_7() (diff)
downloadrtems-5e920ceb0e3cef8df2dce49a2b11d5fbd72f79b3.tar.bz2
bsp/mpc5200: Do not initialize debug registers
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen5200')
-rw-r--r--c/src/lib/libbsp/powerpc/gen5200/start/start.S20
1 files changed, 0 insertions, 20 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/start/start.S b/c/src/lib/libbsp/powerpc/gen5200/start/start.S
index 1dbdc624ec..139711a29e 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/start/start.S
+++ b/c/src/lib/libbsp/powerpc/gen5200/start/start.S
@@ -284,9 +284,6 @@ start:
bne skip_ROM_start /* If BOOT_ROM is not enabled, skip further initialization */
/* do some board dependent configuration (unique for ROM startup) */
- bl SPRG_brk_init /* Initialize special purpose onchip breakpoint registers */
-
-
LWI r30, CSCONTROL_VAL /* get CSCONTROL register content */
stw r30, CSCONTROL(r31) /* enable internal/external bus error and master for CS */
@@ -838,23 +835,6 @@ SPRG_init: /* initialize registers */
blr
-SPRG_brk_init:
- xor r30, r30, r30
-
- mtspr DABR2, r30
- mtspr DBCR, r30
- mtspr IBCR, r30
- mtspr IABR, r30
- mtspr HID2, r30
- mtspr DABR, r30
- mtspr IABR2, r30
-
-
-
-
- blr
-
-
PPC_HID0_rd: /* get HID0 content to r30 */