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authorThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2008-07-11 10:01:37 +0000
committerThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2008-07-11 10:01:37 +0000
commita86f3aac965e39414f19d7e67ed50400583cd598 (patch)
tree24692c56d9b7480af4482d4ac5930d099c3396b1 /c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
parentadded variant to gen68360 BSP (diff)
downloadrtems-a86f3aac965e39414f19d7e67ed50400583cd598.tar.bz2
adapted powerpc BSPs to new exception code
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c')
-rw-r--r--c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
index 0c84535be6..7794185a6a 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
@@ -94,6 +94,8 @@
/* */
/***********************************************************************/
+#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
+
#include <bsp.h>
#include <rtems/libio.h>
@@ -113,7 +115,6 @@ bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */
bd_t uboot_bdinfo_copy; /* will be overwritten with copy of bdinfo */
#endif
-SPR_RW(SPRG0)
SPR_RW(SPRG1)
extern unsigned long intrStackPtr;
@@ -253,9 +254,6 @@ void bsp_start(void)
_write_SPRG1((unsigned int)intrStack);
- /* Signal them that this BSP has fixed PR288 - eventually, this should go away */
- _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
-
bsp_clicks_per_usec = (IPB_CLOCK/1000000);
/*