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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-04-19 11:53:07 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-04-23 09:59:57 +0200 |
| commit | 92d80383ff5b83258a111f90e17fb1c6825297b8 (patch) | |
| tree | 0cd791cef811c6862e4dfab41c037224d8762481 /c/src/lib/libbsp/powerpc/gen5200/include | |
| parent | bsp/mpc5200: Change SDRAM initialization (diff) | |
| download | rtems-92d80383ff5b83258a111f90e17fb1c6825297b8.tar.bz2 | |
bsp/mpc5200: New BSP variant BRS6L
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen5200/include')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/gen5200/include/bsp.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h b/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h index 0a1f859dba..b8c46dc268 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h @@ -109,6 +109,16 @@ LINKER_SYMBOL(MBAR); #define HAS_NVRAM_93CXX +#elif defined(MPC5200_BOARD_BRS6L) + #define MPC5200_BRS6L_FPGA_BEGIN 0x800000 + #define MPC5200_BRS6L_FPGA_SIZE (64 * 1024) + #define MPC5200_BRS6L_FPGA_END \ + (MPC5200_BRS6L_FPGA_BEGIN + MPC5200_BRS6L_FPGA_SIZE) + + #define MPC5200_BRS6L_MRAM_BEGIN 0xff000000 + #define MPC5200_BRS6L_MRAM_SIZE (4 * 1024 * 1024) + #define MPC5200_BRS6L_MRAM_END \ + (MPC5200_BRS6L_MRAM_BEGIN + MPC5200_BRS6L_MRAM_SIZE) #elif defined (PM520) /* Nothing special */ @@ -193,7 +203,7 @@ extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig #define IPB_CLOCK (bsp_uboot_board_info.bi_ipbfreq) #define XLB_CLOCK (bsp_uboot_board_info.bi_busfreq) #define G2_CLOCK (bsp_uboot_board_info.bi_intfreq) -#elif defined(MPC5200_BOARD_BRS5L) +#elif defined(MPC5200_BOARD_BRS5L) || defined(MPC5200_BOARD_BRS6L) #define IPB_CLOCK 66000000 /* 66 MHz */ #define XLB_CLOCK 132000000 /* 132 MHz */ #define G2_CLOCK 396000000 /* 396 MHz */ |