diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-06-17 11:58:41 +0000 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-06-17 11:58:41 +0000 |
| commit | 25ed11d08e98b9893a076c57f694c14892155c01 (patch) | |
| tree | 9dfff040a25548e21b1518f66612a33b6d82fa3d /c/src/lib/libbsp/powerpc/gen5200/include | |
| parent | 2011-06-17 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-25ed11d08e98b9893a076c57f694c14892155c01.tar.bz2 | |
2011-06-17 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am: Added custom memcpy(). Update for network sources.
* configure.ac: Enable interrupt driven Termios for all BSPs.
* ide/pcmcia_ide.c: Disable broken DMA support.
* include/bsp.h: Fixed NEED_LOW_LEVEL_INIT define. Set default
console baud to 115200.
* include/irq.h, irq/irq.c: Fixed interrupt handling to avoid the
following problems: 1. multiple invokation of peripheral interrupt
handlers, 2. missing synchronization after mask write and enabling of
external exceptions, and 3. logic overhead.
* network_5200/network.c: Added MII interface. Fixed controller
restart after FIFO errors. Performance improvements.
* start/start.S: Fixed ROM startup. Initialize XLB arbiter for all
BSPs.
* startup/bspstart.c: Special intialization for MPC5200B (B variant).
Install standard alignment handler.
* startup/cpuinit.c, startup/linkcmds.brs5l, startup/linkcmds.dp2,
startup/linkcmds.icecube, startup/linkcmds.pm520_cr825,
startup/linkcmds.pm520_ze30: Avoid accesses outside the RAM area.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen5200/include')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/gen5200/include/bsp.h | 12 | ||||
| -rw-r--r-- | c/src/lib/libbsp/powerpc/gen5200/include/irq.h | 17 |
2 files changed, 13 insertions, 16 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h b/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h index 18f5b70630..cdfdd0c265 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h @@ -79,6 +79,11 @@ LINKER_SYMBOL(MBAR); #define PM520 #endif +#if !defined(HAS_UBOOT) + /* we need the low level initialization in start.S*/ + #define NEED_LOW_LEVEL_INIT +#endif + #if defined(BRS5L) /* * IMD Custom Board BRS5L @@ -118,11 +123,6 @@ extern "C" { #include <bsp/vectors.h> #include <bsp/u-boot.h> -#if !defined(HAS_UBOOT) - /* we need the low level initialization in start.S*/ - #define NEED_LOW_LEVEL_INIT -#endif - /* * Network driver configuration */ @@ -179,7 +179,7 @@ extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig #if defined(HAS_UBOOT) #define GEN5200_CONSOLE_BAUD (bsp_uboot_board_info.bi_baudrate) #else -#define GEN5200_CONSOLE_BAUD 9600 +#define GEN5200_CONSOLE_BAUD 115200 #endif /* diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/irq.h b/c/src/lib/libbsp/powerpc/gen5200/include/irq.h index 683e06ccfd..8882238e8b 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/include/irq.h +++ b/c/src/lib/libbsp/powerpc/gen5200/include/irq.h @@ -87,16 +87,13 @@ #ifndef LIBBSP_POWERPC_GEN5200_IRQ_H #define LIBBSP_POWERPC_GEN5200_IRQ_H -#define CHK_CE_SHADOW(_pmce) ((_pmce) & 0x00000001) -#define CHK_CSE_STICKY(_pmce) (((_pmce) >> 10) & 0x00000001) -#define CHK_MSE_STICKY(_pmce) (((_pmce) >> 21) & 0x00000001) -#define CHK_PSE_STICKY(_pmce) (((_pmce) >> 29) & 0x00000001) -#define CLR_CSE_STICKY(_pmce) ((_pmce) |= (1 << 29 )) -#define CLR_MSE_STICKY(_pmce) ((_pmce) |= (1 << 21 )) -#define CLR_PSE_STICKY(_pmce) ((_pmce) |= (1 << 10 )) -#define CSE_SOURCE(_source) (((_source) >> 8) & 0x00000003) -#define MSE_SOURCE(_source) (((_source) >> 16) & 0x0000001F) -#define PSE_SOURCE(_source) (((_source) >> 24) & 0x0000001F) +#define PMCE_CE_SHADOW (1U << (31 - 31)) +#define PMCE_CSE_STICKY (1U << (31 - 21)) +#define PMCE_MSE_STICKY (1U << (31 - 10)) +#define PMCE_PSE_STICKY (1U << (31 - 2)) +#define PMCE_CSE_SOURCE(_pmce) (((_pmce) >> 8) & 0x3U) +#define PMCE_MSE_SOURCE(_pmce) (((_pmce) >> 16) & 0x1fU) +#define PMCE_PSE_SOURCE(_pmce) (((_pmce) >> 24) & 0x1fU) /* * Peripheral IRQ handlers related definitions |