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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-01-11 18:25:35 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-01-11 18:25:35 +0000 |
commit | eabd9f06e73034771d77bb9e8fc7096ce82fd0f5 (patch) | |
tree | c322b512f8ec4bb26d862818cc52f71d1ff61aee /c/src/lib/libbsp/powerpc/gen5200/configure.ac | |
parent | Add http://www.rtems.info, http://www.rtems.org/ftp. (diff) | |
download | rtems-eabd9f06e73034771d77bb9e8fc7096ce82fd0f5.tar.bz2 |
2008-01-11 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac, irq/irq.c, startup/bspclean.c, startup/bspstart.c: Add
ALLOW_IRQ_NESTING option. The MPC5200 has a settle time after
acknowledging the IRQs and currently the BSP does not account for
that. After acknowledging an interrupt, it currently gets a second
spurious IRQ a significant percentage of the time. Rename to
BENCHMARK_IRQ_PROCESSING and get it working again. Under one test
load, not nesting interrupts resulted in a 50% reduction in the
number of IRQs and an ~30% reduction in time spent in IRQs.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/gen5200/configure.ac')
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen5200/configure.ac | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/configure.ac b/c/src/lib/libbsp/powerpc/gen5200/configure.ac index 1932321d47..f9bc5b3709 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/configure.ac +++ b/c/src/lib/libbsp/powerpc/gen5200/configure.ac @@ -25,6 +25,14 @@ RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], [If defined, the instruction cache will be enabled after address translation is turned on.]) +RTEMS_BSPOPTS_SET([BENCHMARK_IRQ_PROCESSING],[*],[0]) +RTEMS_BSPOPTS_HELP([BENCHMARK_IRQ_PROCESSING], +[If defined, enable code to benchmark IRQ processing.]) + +RTEMS_BSPOPTS_SET([ALLOW_IRQ_NESTING],[*],[1]) +RTEMS_BSPOPTS_HELP([ALLOW_IRQ_NESTING], +[If defined, allow nested IRQ processing.]) + RTEMS_CHECK_NETWORKING AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") |