2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>

	* acinclude.m4: Initial release of ep1a bsp
	* ep1a/Makefile.am, ep1a/bsp_specs, ep1a/configure.ac,
	ep1a/console/alloc360.c, ep1a/console/console.c,
	ep1a/console/console.h, ep1a/console/init68360.c,
	ep1a/console/m68360.h, ep1a/console/mc68360_scc.c,
	ep1a/console/ns16550cfg.c, ep1a/console/ns16550cfg.h,
	ep1a/console/rsPMCQ1.c, ep1a/console/rsPMCQ1.h, ep1a/include/bsp.h,
	ep1a/irq/irq.c, ep1a/irq/irq_init.c, ep1a/pci/no_host_bridge.c,
	ep1a/start/start.S, ep1a/startup/bspstart.c, ep1a/startup/linkcmds,
	ep1a/vme/vmeconfig.c: New files.

1 files changed, 60 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/powerpc/ep1a/include/tm27.h b/c/src/lib/libbsp/powerpc/ep1a/include/tm27.h
new file mode 100644
index 0000000000..c62810edda
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ep1a/include/tm27.h
@@ -0,0 +1,60 @@
+/*
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+#include <bsp/irq.h>
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+void nullFunc() {}
+
+static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
+					      0,
+					      (rtems_irq_enable)nullFunc,
+					      (rtems_irq_disable)nullFunc,
+					      (rtems_irq_is_enabled) nullFunc};
+void Install_tm27_vector(void (*_handler)())
+{
+  clockIrqData.hdl = _handler;
+  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
+	printk("Error installing clock interrupt handler!\n");
+	rtems_fatal_error_occurred(1);
+  }
+}
+
+#define Cause_tm27_intr()  \
+  do { \
+    unsigned32 _clicks = 8; \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+  } while (0)
+
+
+#define Clear_tm27_intr() \
+  do { \
+    unsigned32 _clicks = 0xffffffff; \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+   } while (0)
+
+#define Lower_tm27_intr() \
+  do { \
+    unsigned32 _msr = 0; \
+    _ISR_Set_level( 0 ); \
+    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+    _msr |=  0x8002; \
+    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+  } while (0)
+#endif