2005-04-28 Joel Sherrill <joel@OARcorp.com>

	* acinclude.m4: Remove dmv177 and ppcn_60x.
	* dmv177/.cvsignore, dmv177/ChangeLog, dmv177/Makefile.am,
	dmv177/QUIRKS, dmv177/README, dmv177/README.net, dmv177/STATUS,
	dmv177/bsp_specs, dmv177/cable.doc, dmv177/configure.ac,
	dmv177/times, dmv177/clock/clock.c, dmv177/console/conscfg.c,
	dmv177/console/debugio.c, dmv177/include/.cvsignore,
	dmv177/include/bsp.h, dmv177/include/dmv170.h, dmv177/include/tm27.h,
	dmv177/scv64/scv64.c, dmv177/sonic/dmvsonic.c, dmv177/start/start.S,
	dmv177/startup/bspclean.c, dmv177/startup/bspstart.c,
	dmv177/startup/genpvec.c, dmv177/startup/linkcmds,
	dmv177/startup/setvec.c, dmv177/startup/vmeintr.c,
	dmv177/timer/timer.c, dmv177/tod/todcfg.c, ppcn_60x/.cvsignore,
	ppcn_60x/ChangeLog, ppcn_60x/Makefile.am, ppcn_60x/README,
	ppcn_60x/STATUS, ppcn_60x/bsp_specs, ppcn_60x/configure.ac,
	ppcn_60x/clock/clock.c, ppcn_60x/console/config.c,
	ppcn_60x/console/console.c, ppcn_60x/console/console.h,
	ppcn_60x/console/debugio.c, ppcn_60x/console/i8042.c,
	ppcn_60x/console/i8042_p.h, ppcn_60x/console/i8042vga.c,
	ppcn_60x/console/i8042vga.h, ppcn_60x/console/ns16550cfg.c,
	ppcn_60x/console/ns16550cfg.h, ppcn_60x/console/vga.c,
	ppcn_60x/console/vga_p.h, ppcn_60x/console/z85c30cfg.c,
	ppcn_60x/console/z85c30cfg.h, ppcn_60x/include/.cvsignore,
	ppcn_60x/include/bsp.h, ppcn_60x/include/extisrdrv.h,
	ppcn_60x/include/nvram.h, ppcn_60x/include/pci.h,
	ppcn_60x/include/tm27.h, ppcn_60x/network/amd79c970.c,
	ppcn_60x/network/amd79c970.h, ppcn_60x/nvram/ds1385.h,
	ppcn_60x/nvram/mk48t18.h, ppcn_60x/nvram/nvram.c,
	ppcn_60x/nvram/prepnvr.h, ppcn_60x/nvram/stk11c68.h,
	ppcn_60x/pci/pci.c, ppcn_60x/start/start.S,
	ppcn_60x/startup/bspclean.c, ppcn_60x/startup/bspstart.c,
	ppcn_60x/startup/bsptrap.S, ppcn_60x/startup/genpvec.c,
	ppcn_60x/startup/linkcmds, ppcn_60x/startup/rtems-ctor.cc,
	ppcn_60x/startup/setvec.c, ppcn_60x/startup/spurious.c,
	ppcn_60x/startup/swap.c, ppcn_60x/timer/timer.c, ppcn_60x/tod/cmos.h,
	ppcn_60x/tod/tod.c, ppcn_60x/universe/universe.c,
	ppcn_60x/vectors/README, ppcn_60x/vectors/align_h.S,
	ppcn_60x/vectors/vectors.S: Removed.

1 files changed, 0 insertions, 74 deletions

diff --git a/c/src/lib/libbsp/powerpc/dmv177/QUIRKS b/c/src/lib/libbsp/powerpc/dmv177/QUIRKS
deleted file mode 100644
index e1d95e6427..0000000000
--- a/c/src/lib/libbsp/powerpc/dmv177/QUIRKS
+++ /dev/null
@@ -1,74 +0,0 @@
-#
-#  Quirks in the DY-4 DMV177
-#
-#  $Id$
-#
-
-JTAG and Caching
-================
-If data or code caching is enabled on certain revisions of the PPC603e,
-then the JTAG emulator interface become disfunctional.  You can not
-debug using the emulator on these chip revisions.  On certain revisions,
-it is so bad that when code caching is enabled, you can not even 
-download code reliably to the board.
-
-Caching and Peripherals
-=======================
-When caching is enabled, care must be exercised to insure that all
-peripheral addresses are still uncached.
-
-Exar 88681 Clock
-================
-This board uses a different clock for the Exar 88681 DUART than is
-documented in the Exar manual or the original MC68681 manual.  This
-resulted in the need for the the mc68681 libchip driver to support
-BSP specific baud rate tables and the development of a DMV177
-specific baud rate table.
-
-In the end, this all works but you have a very limited range of
-useful baud rates on the 88681 ports compared to what would have
-been supported had DY-4 just followed the Exar or Motorola manual.
-
-
-SCC Addresses
-=============
-The full set of SCC addresses is not documented in the DY-4 manual
-and they are not ordered as one would expect.  Normally the four
-SCC registers are ordered Control A, Data A, Control B, and Data B.
-DY-4 orders them with B first.
-
-This required extra time to debug.
-
-
-SCV64 and the Foundation Firmware
-=================================
-DY-4 technical support did not offer code to determine which interrupt
-sources were pending at the SCV64.  They recommended calling into the
-Foundation Firmware ROM monitor to figure this out.  The Foundation
-Firmware did not recognize enough interrupts on this board to be useful.
-
-In the end, we gave up on their technical support's recommendation
-and directly manipulated the SVC64.  This is what we wanted to do in
-the first place but we got no information from them to aid in this.
-Luckily, the manual does document enough of DY-4's mapping of the specific
-interrupt sources to make this work.
-
-
-Z85C30 SCC Clock Speed
-======================
-
-The Z85C30 SCC can be factory configured for 10 Mhz or 2.4616 Mhz.  Code
-had to be added to dynamically determine which clock was installed.
-
-The board we had used a 10 Mhz clock.  No testing was done with a 2.4616 Mhz
-clock.
-
-
-P2 Octopus Cable
-================
-
-DY-4's P2 breakout is large and a bit unwieldy.  It was difficult to 
-fight into the VME cage we used.  The SCSI connector comes off the 
-side and is very stiff thus making it difficult to route around
-anything in the back of the cage.  We gave up on trying to use
-it in the first few slots of OAR's cage.