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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-20 13:07:34 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-20 13:07:34 +0000 |
commit | 176e1ed8aa32d46f18a40a8f90f2c43e7dcec434 (patch) | |
tree | c9272f5684764d09534391bca3a2cadfacbbeb83 /c/src/lib/libbsp/mips | |
parent | 2001-04-16 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-176e1ed8aa32d46f18a40a8f90f2c43e7dcec434.tar.bz2 |
2001-04-20 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S: Added code to save and restore SR and EPC to
properly support nested interrupts. Note that the ISR
(not RTEMS) enables interrupts allowing the nesting to occur.
Diffstat (limited to 'c/src/lib/libbsp/mips')
0 files changed, 0 insertions, 0 deletions