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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-02-08 20:03:26 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-02-08 20:03:26 +0000 |
commit | fb639847713fed3ed2c94e41e7f21d09cebe4af2 (patch) | |
tree | 1698f481ff266b22ee0e49b18026ca15d24f15b2 /c/src/lib/libbsp/mips/shared/gdbstub/r46kstub.ld | |
parent | 2002-02-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff) | |
download | rtems-fb639847713fed3ed2c94e41e7f21d09cebe4af2.tar.bz2 |
2002-02-08 Joel Sherrill <joel@OARcorp.com>
* Merged r46kstub.c into RTEMS distribution without modification.
I got the code from Franz Fischer <Franz.Fischer@franz-fischer.de>
who had used this with an old version of RTEMS with the mips64orion
port of RTEMS. After adding this to the repository, I will tailor
this to work with the RTEMS exception processing model and trim
no longer needed parts.
* ChangeLog, gdb_if.h, ioaddr.h, limits.h, Makefile, mips_opcode.h,
r4600.h, r46kstub.c, r46kstub.ld, README, stubinit.S:
Diffstat (limited to 'c/src/lib/libbsp/mips/shared/gdbstub/r46kstub.ld')
-rw-r--r-- | c/src/lib/libbsp/mips/shared/gdbstub/r46kstub.ld | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/mips/shared/gdbstub/r46kstub.ld b/c/src/lib/libbsp/mips/shared/gdbstub/r46kstub.ld new file mode 100644 index 0000000000..675a7ee613 --- /dev/null +++ b/c/src/lib/libbsp/mips/shared/gdbstub/r46kstub.ld @@ -0,0 +1,53 @@ +MEMORY +{ + NUL : ORIGIN = 0xa00f0000, LENGTH = 0 + RAM : ORIGIN = 0xa00fe000, LENGTH = 8K + ROM : ORIGIN = 0xbfc00000, LENGTH = 8K +} + +SECTIONS +{ + /* Initialized data is _not_ supported. */ + /* Assign it to an empty region in order */ + /* to force a link error if any exists. */ + .data 0xa00f0000 (NOLOAD): { + _fdata = .; + *(.data) + . = ALIGN(8); + _gp = . + 0x8000; + *(.sdata) + . = ALIGN(8); + _edata = .; + } >NUL + + /* Assign uninitialized read/write data to RAM. */ + .bss 0xa00fe000 (NOLOAD): { + _fbss = .; + stubinit.o(.bss) + *(.sbss) + *(.bss) + *(.scommon) + *(COMMON) + . = ALIGN(8); + _end = .; + } >RAM + + /* Assign code and read-only data to ROM. This */ + /* section MUST start at the reset address, */ + /* and the reset code MUST be linked first. */ + .text 0xbfc00000: { + _ftext = .; + stubinit.o(.text) + . = ALIGN(8); + r46kstub.o(.text) + . = ALIGN(8); + *(.rdata) + . = ALIGN(8); + *(.rodata) + . = ALIGN(8); + _etext = .; + } >ROM = 0 + +} + +ENTRY(_reset_exception) |