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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-12-13 22:16:28 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-12-13 22:16:28 +0000 |
| commit | 7a677fd7d3127d3fd93e32140532d4bad637bb71 (patch) | |
| tree | 7634c790b2317c921145dbceca93824a5d875a18 /c/src/lib/libbsp/mips/jmr3904/clock | |
| parent | 2000-12-13 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-7a677fd7d3127d3fd93e32140532d4bad637bb71.tar.bz2 | |
2000-12-13 Joel Sherrill <joel@OARcorp.com>
* README: Updated. We are now vectoring a clock tick ISR handler.
But RTEMS is not returning from the ISR properly.
* clock/clockdrv.c: Now causes interrupts but has not been calibrated.
* include/bsp.h: Use <libcpu/tx3904.h>
* startup/Makefile.am: Add setvec.c from shared.
* startup/bspstart.c: Initialize the status register (SR) so
no interrupts are masked but global interrupts (SR_IEC) are off.
Added call to install the ISR prologue code.
* wrapup/Makefile.am: Pick up more pieces from libcpu.
Diffstat (limited to 'c/src/lib/libbsp/mips/jmr3904/clock')
| -rw-r--r-- | c/src/lib/libbsp/mips/jmr3904/clock/clockdrv.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/mips/jmr3904/clock/clockdrv.c b/c/src/lib/libbsp/mips/jmr3904/clock/clockdrv.c index c49150fba6..7436f1676a 100644 --- a/c/src/lib/libbsp/mips/jmr3904/clock/clockdrv.c +++ b/c/src/lib/libbsp/mips/jmr3904/clock/clockdrv.c @@ -7,12 +7,26 @@ * $Id$ */ -#define CLOCK_VECTOR 0 +#include <rtems.h> +#include <libcpu/tx3904.h> + +#define CLOCK_VECTOR TX3904_IRQ_TMR0 #define Clock_driver_support_at_tick() +/* XXX */ +#define CLICKS 10000 #define Clock_driver_support_install_isr( _new, _old ) \ - do { _old = 0; } while(0) + do { \ + unsigned32 _clicks = CLICKS; \ + _old = (rtems_isr_entry) set_vector( _new, CLOCK_VECTOR, 1 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0xC0 ); \ + *((volatile unsigned32 *) 0xFFFFC01C) = 0x00000700; \ + } while(0) #define Clock_driver_support_initialize_hardware() |