diff options
| author | Eric Norum <WENorum@lbl.gov> | 2006-05-15 14:47:32 +0000 |
|---|---|---|
| committer | Eric Norum <WENorum@lbl.gov> | 2006-05-15 14:47:32 +0000 |
| commit | a7edc92901077488c4fdf80fa17a84caea661604 (patch) | |
| tree | 6698d48721b5fd6e5405f93835b19fe43b341c6a /c/src/lib/libbsp/m68k | |
| parent | Remove non-longer-appropriate comment. (diff) | |
| download | rtems-a7edc92901077488c4fdf80fa17a84caea661604.tar.bz2 | |
Improve handling of unexpected FPGA interrupt conditions.
Diffstat (limited to 'c/src/lib/libbsp/m68k')
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/ChangeLog | 4 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c | 22 |
2 files changed, 23 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/ChangeLog b/c/src/lib/libbsp/m68k/uC5282/ChangeLog index f0652a7cff..dd32f16f7c 100644 --- a/c/src/lib/libbsp/m68k/uC5282/ChangeLog +++ b/c/src/lib/libbsp/m68k/uC5282/ChangeLog @@ -1,3 +1,7 @@ +2006-05-15 Eric Norum <norume@aps.anl.gov> + + * startup/bspstart.c: Add checks for FPGA interrupt request overflow. + 2006-04-11 Eric Norum <norume@aps.anl.gov> * startup/bspstart.c: Install default exception handler. diff --git a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c index 26541d280e..28e5e4bc55 100644 --- a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c @@ -470,12 +470,28 @@ trampoline (rtems_vector_number v) * Handle FPGA interrupts until all have been consumed */ if (v == FPGA_VECTOR) { + int loopcount = 0; while (((v = FPGA_IRQ_INFO) & 0x80) != 0) { v = 192 + (v & 0x3f); - if (handlerTab[v].func) + if (++loopcount >= 50) { + rtems_interrupt_level level; + rtems_interrupt_disable(level); + printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v); + MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1; + rtems_interrupt_enable(level); + return; + } + if (handlerTab[v].func) { (*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v); - else - rtems_fatal_error_occurred(v); + } + else { + rtems_interrupt_level level; + rtems_interrupt_disable(level); + printk("\nINVALID FPGA INTERRUPT (0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v); + MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1; + rtems_interrupt_enable(level); + return; + } } } else if (handlerTab[v].func) |