2002-08-07 Joel Sherrill <joel@OARcorp.com>

	* start/Makefile.am: Pick up rest of Ralf'f changes and use
	cp not make-rel since there is no point in this case.
	* start/debugreset.S: Rights were not assigned.
	* start/reset.S: Add ifdef to avoid core dump until Chris can
	track it down.
	* start/cpuboot.c: Moved to startup.
	* startup/Makefile.am: Account for above.

4 files changed, 13 insertions, 155 deletions

diff --git a/c/src/lib/libbsp/m68k/ods68302/start/Makefile.am b/c/src/lib/libbsp/m68k/ods68302/start/Makefile.am
index d374e7c690..a4e16e5c3c 100644
--- a/c/src/lib/libbsp/m68k/ods68302/start/Makefile.am
+++ b/c/src/lib/libbsp/m68k/ods68302/start/Makefile.am
@@ -2,17 +2,12 @@
 ## $Id$
 ##
 
-RESET_S_FILES_yes_V = debugreset.S
-RESET_S_FILES_no_V = reset.S
-RESET_S_FILES__V = $(RESET_S_FILES_no_V)
-RESET_S_FILES = $(RESET_S_FILES_$(RTEMS_DEBUGGER)_V)
-
-CFLAGS_no_V = -DGDB_MONITOR_ACTIVE
-CFLAGS__V = $(CFLAGS_no_V)
-CFLAGS_V = $(CFLAGS_$(RTEMS_DEBUGGER)_V)
-
-C_FILES = cpuboot.c
-C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
+# FIXME: Better merge both files into one and use #ifdef GDB_MONITOR_ACTIVE
+if ODS68302_DEBUG
+RESET_S_FILES = debugreset.S
+else
+RESET_S_FILES = reset.S
+endif
 
 S_FILES = $(RESET_S_FILES)
 S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
@@ -32,7 +27,7 @@ AM_CFLAGS += $(CFLAGS_V)
 bsplib_DATA = $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o
 
 $(ARCH)/start.o: $(OBJS)
-	$(make-rel)
+	cp $(S_O_FILES) $(ARCH)/start.o
 
 $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o: $(ARCH)/start.o
 	$(INSTALL_DATA) $< $@
diff --git a/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c b/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c
deleted file mode 100644
index 95b205d6fc..0000000000
--- a/c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*****************************************************************************/
-/*
-  Boot the CPU.
-
-  Occurs in 3 phases for a 68302.
-
-  Phase 1.
-
-  Called as soon as able after reset. The BAR has been programed, and
-  a small stack exists in the DPRAM. All interrupts are masked, and
-  the processor is running in supervisor mode. No other hardware or
-  chip selects are active.
-
-  This phase programs the chip select registers, the parallel ports
-  are set into default configurations, and basic registers cleared or
-  reset. The leds are programmed to show the end of phase 1.
-
-  Phase 2.
-
-  This is a piece of code which is copied to DPRAM and executed. It
-  should not do any more thann is currently present. The return to ROM
-  is managed by modifing the return address. Again leds show the status.
-
-  Phase 3.
-
-  This code executes with a valid C environment. That is the data
-  section has been intialised and the bss section set to 0. This phase
-  performs any special card initialisation and then calls boot card.
-  
-  $Id$
-  
-*/
-/*****************************************************************************/
-
-#include <bsp.h>
-#include <m68302.h>
-#include <debugport.h>
-#include <crc.h>
-
-/*
-  Open the address, reset all registers
-  */
-
-extern int ROM_SIZE, ROM_BASE;
-extern int RAM_SIZE, RAM_BASE;
-
-#define _ROM_SIZE ((unsigned int)&ROM_SIZE)
-#define _ROM_BASE ((unsigned int)&ROM_BASE)
-#define _RAM_SIZE ((unsigned int)&RAM_SIZE)
-#define _RAM_BASE ((unsigned int)&RAM_BASE)
-
-void boot_phase_1()
-{
-  M302_SCR = SCR_DEFAULT;
-
-  WRITE_OR(CSEL_ROM, _ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
-  WRITE_BR(CSEL_ROM, _RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
-  WRITE_OR(CSEL_RAM, _RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
-  WRITE_BR(CSEL_RAM, _ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
-
-#if defined(CSEL_1)
-  WRITE_OR(CSEL_1, CSEL_1_SIZE, CSEL_1_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
-  WRITE_BR(CSEL_1, CSEL_1_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
-#endif
-  
-#if defined(CSEL_2)
-  WRITE_OR(CSEL_2, CSEL_2_SIZE, CSEL_2_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
-  WRITE_BR(CSEL_2, CSEL_2_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
-#endif
-  
-  m302.reg.gimr = m302.reg.ipr = m302.reg.imr = m302.reg.isr = 0;
-  
-  m302.reg.simode = 0;
-
-  m302.reg.pacnt = CARD_PA_CONFIGURATION;
-  m302.reg.paddr = CARD_PA_DEFAULT_DIRECTIONS;
-  m302.reg.padat = CARD_PA_DEFAULT_DATA;
-
-  m302.reg.pbcnt = CARD_PB_CONFIGURATION;
-  m302.reg.pbddr = CARD_PB_DEFAULT_DIRECTIONS;
-  m302.reg.pbdat = CARD_PB_DEFAULT_DATA;
-
-  m302.reg.wrr = WATCHDOG_TIMEOUT_PERIOD | WATCHDOG_ENABLE;
-
-#if defined(LED_CONTROL)
-  LED_CONTROL(LED_1_RED, LED_2_OFF, LED_3_OFF, LED_4_OFF,
-              LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
-#endif  
-}
-
-/*
-  Swap the chip select mapping for ROM and RAM
-  */
-
-void boot_phase_2(void)
-{
-  rtems_unsigned32 stack;
-  
-#if defined(LED_CONTROL)
-  LED_CONTROL(LED_1_RED, LED_2_RED, LED_3_OFF, LED_4_OFF,
-              LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
-#endif
-  
-  WRITE_BR(CSEL_ROM, ROM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
-  WRITE_BR(CSEL_RAM, RAM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
-  
-#if defined(LED_CONTROL)
-  LED_CONTROL(LED_1_GREEN, LED_2_RED, LED_3_OFF, LED_4_OFF,
-              LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
-#endif
-
-  /* seems to want 2, looked at assember code output */
-  *(&stack + 2) |= ROM_BASE;
-}
-
-/*
-  Any pre-main initialisation, the C environment is setup, how-ever C++
-  static constructors have not been called, and RTEMS is not initialised.
-  */
-
-void boot_card();
-void set_debug_traps();
-void breakpoint();
-
-void boot_phase_3(void)
-{
-  if (GDB_RUN_MONITOR())
-  {
-    set_debug_traps();
-    breakpoint();
-  }
-  
-  debug_port_banner();
-  
-  /* FIXME : add RAM and ROM checks */
-  
-  /* boot the bsp, what ever this means */
-  boot_card();
-
-  WATCHDOG_TRIGGER();
-}
diff --git a/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S b/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S
index 3438f93c51..ce14cac79c 100644
--- a/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S
+++ b/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S
@@ -18,7 +18,6 @@
  *        
  *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
  *  On-Line Applications Research Corporation (OAR).
- *  All rights assigned to U.S. Government, 1994.
  *
  *  This material may be reproduced by or for the U.S. Government pursuant
  *  to the copyright license under the clause at DFARS 252.227-7013.  This
diff --git a/c/src/lib/libbsp/m68k/ods68302/start/reset.S b/c/src/lib/libbsp/m68k/ods68302/start/reset.S
index c31a7a4faf..1d1aec955f 100644
--- a/c/src/lib/libbsp/m68k/ods68302/start/reset.S
+++ b/c/src/lib/libbsp/m68k/ods68302/start/reset.S
@@ -18,7 +18,6 @@
  *        
  *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
  *  On-Line Applications Research Corporation (OAR).
- *  All rights assigned to U.S. Government, 1994.
  *
  *  This material may be reproduced by or for the U.S. Government pursuant
  *  to the copyright license under the clause at DFARS 252.227-7013.  This
@@ -494,6 +493,7 @@ zerobss_loop:
 unhandled_exception:
                 
 EXCEPTION_HANDLER(#, 0)
+#if 0
 EXCEPTION_HANDLER(#, 1)
 EXCEPTION_HANDLER(#, 2)
 EXCEPTION_HANDLER(#, 3)
@@ -775,9 +775,13 @@ EXCEPTION_HANDLER(#, 253)
 EXCEPTION_HANDLER(#, 254)
 EXCEPTION_HANDLER(#, 255)                                
 
+#endif
+
+
 
 common_exception_handler: 
 
+#if 0
         |
         | Need to put the format/vector above the PC and status register
         |
@@ -839,6 +843,7 @@ ceh_30:
 | The RAM based vector table
 |
 
+#endif
         .sect   .vtable
 
         .global vector_table