Merged very large and much appreciated patch from Chris Johns

<cjohns@plessey.com.au>.  This patch includes the ods68302 bsp,
the RTEMS++ class library, and the rtems++ test.

7 files changed, 637 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/m68k/ods68302/include/Makefile.in b/c/src/lib/libbsp/m68k/ods68302/include/Makefile.in
new file mode 100644
index 0000000000..a999dff621
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/Makefile.in
@@ -0,0 +1,35 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+VPATH=@srcdir@
+
+H_FILES = $(srcdir)/bare.h $(srcdir)/bsp.h \
+		$(srcdir)/coverhd.h $(srcdir)/crc.h \
+		$(srcdir)/debugport.h \
+		$(srcdir)/m68302scc.h
+
+#
+#  Equate files are for including from assembly preprocessed by
+#  gm4 or gasp.  No examples are provided except for those for
+#  other CPUs.  The best way to generate them would be to
+#  provide a program which generates the constants used based
+#  on the C equivalents.
+#
+
+EQ_FILES =
+
+SRCS=$(H_FILES) $(EQ_FILES)
+
+include $(RTEMS_CUSTOM)
+include $(PROJECT_ROOT)/make/leaf.cfg
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all:	$(SRCS)
+	$(INSTALL) -m 444 $(H_FILES) ${PROJECT_RELEASE}/include
+	$(INSTALL) -m 444 $(EQ_FILES) ${PROJECT_RELEASE}/include
diff --git a/c/src/lib/libbsp/m68k/ods68302/include/bare.h b/c/src/lib/libbsp/m68k/ods68302/include/bare.h
new file mode 100644
index 0000000000..7632b27ded
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/bare.h
@@ -0,0 +1,246 @@
+/*****************************************************************************/
+/*
+  $Id$
+
+  Card Definition for a bare board.
+
+  This is an example file which actually builds a BSP for a 68302 card
+  called an MVF (Multi-Voice-Frequency). The card is one of a range
+  which run in a 100Mbit voice/video/data switch used for high end
+  applications such as Air Traffic Control. The transport is
+  FDDI-2. Yes it alive and well and working in real systems.
+
+  Chip selects are programmed as required. Three are controlled in the
+  boot code. They are RAM, ROM, and peripherals. You can optionally
+  configure the other two chip selects.
+  
+  SYSTEM_CLOCK - You must defined this. It is used for setting the
+  baud rate.
+
+  CSEL_ROM, CSEL_RAM - Must be defined, and made to be a single number
+  with brackets.
+
+  ROM_WAIT_STATES, RAM_WAIT_STATES - Must be defined. This sets the
+  speed for the ROM and RAM.
+
+  ROM and RAM size is passed on the command line. The makefile holds
+  them. This allows a single place to defined it. The makefile allows
+  them to be passed to the linker.
+
+  CSEL_1, CSEL_2 - If defined the other macros needed to define the
+  chip select must be defined. If not defined they are not programmed
+  and registers are left in the reset state.
+  
+  Card Specific Devices - The MVF card uses a chip select to address a
+  range of peripherials (CSEL_2). These include front panel leds, and
+  4 digit diagnostic display device. Put what ever you need.
+
+  LED_CONTROL - If defined the boot code will set leds as it goes.
+
+  UPDATE_DISPLAY - A four digit display device will also be updated to
+  show the boot state.
+
+  CARD_PA, CARD_PB - The default configuration, data direction and
+  data must be specified.
+
+  This file allows a range of common parameters which vary from one
+  variant of card to another to placed in a central file.
+  
+*/
+/*****************************************************************************/
+
+#ifndef _BARE_H_
+#define _BARE_H_
+
+#if __cplusplus
+extern "C" 
+{
+#endif
+
+/* name of the card */
+#define CARD_ID "m68302-odsbare"
+
+/* speed of the processor */
+#define SYSTEM_CLOCK (15360000)
+
+#define SCR_DEFAULT  (RBIT_SCR_IPA | RBIT_SCR_HWT | RBIT_SCR_WPV | RBIT_SCR_ADC | \
+                      RBIT_SCR_HWDEN | RBIT_SCR_HWDCN1 | RBIT_SCR_EMWS)
+
+/* define the chip selects */
+#define CSEL_ROM           0            /* token pasted so no brackets */
+#define ROM_WAIT_STATES    (OR_DTACK_1) /* 100nsec at 16MHz */
+#define CSEL_RAM           3
+#define RAM_WAIT_STATES    (OR_DTACK_0) /* 70nsec at 16MHz */
+
+/* The remaining chip selects are called 1 and 2 */
+/*
+#define CSEL_1             1
+#define CSEL_1_BASE        (0x00?00000)
+#define CSEL_1_SIZE        (0x00?00000)
+#define CSEL_1_WAIT_STATES (OR_DTACK_1)
+*/
+#define CSEL_2             2
+#define CSEL_2_BASE        (0x00800000)
+#define CSEL_2_SIZE        (0x00040000)
+#define CSEL_2_WAIT_STATES (OR_DTACK_EXT)
+
+/* 
+ * Need to define a watchdog period  
+ */
+#define WATCHDOG_TIMEOUT_PERIOD (3000 * 2)
+
+/*
+ * Console and debug port allocation, 0=SCC1, 2=SCC3
+ */
+
+#define CONSOLE_PORT  1
+#define CONSOLE_BAUD  SCC_9600
+#define DEBUG_PORT    2
+#define DEBUG_BAUD    SCC_57600
+
+/* ----
+   Parallel Port Configuration, and default data directions
+
+   PORT  BITS - NAME                 , WHO       , DEFAULT WHAT
+   ------------------------------------------------------------
+   PPA:: 1: 0 - Serial               , PERIPHERAL, -
+   PPA:: 7: 2 - MVF_PPA:7:2          , IO        , INPUTS
+   PPA:: 9: 8 - Serial               , PERIPHERAL, -
+   PPA::15:10 - MVF_PPB:15:10        , IO        , INPUTS
+
+   PPB:: 1: 0 - Setup                , IO        , INPUTS
+   PPB:: 3: 2 - SYNC_HIGHWAY_1:2     , IO        , INPUTS
+              - SYNC_HIGHWAY_2:3     , IO        , INPUTS
+   PPB:: 4: 4 - HARDWARE_RESET:4     , IO        , OUTPUT
+   PPB:: 6: 5 - SOFTWARE_OVERRIDE_1:6, IO        , OUTPUT
+              - SOFTWARE_OVERRIDE_2:5, IO        , OUTPUT
+   PPB:: 7: 7 - Watchdog             , PERIPHERAL, -
+   PPB::11: 8 - Interrupt            , PERIPHERAL, -
+   PPB::15:12 - Not implemented on the 68302
+
+         15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
+   ------------------------------------------------------
+   PACNT  0  0  0  0  0  0  1  1  0  0  0  0  0  0  1  1 = 0x0303
+   PBCNT  -  -  -  -  -  -  -  -  1  0  0  0  0  0  0  0 = 0x0080
+
+   PADDR  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 = 0x0000
+   PBDDR  0  0  0  0  0  0  0  0  0  1  1  1  0  0  0  0 = 0x0070
+
+   PADAT  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 = 0x0000
+
+ */
+#define CARD_PA_CONFIGURATION       0x0303
+#define CARD_PB_CONFIGURATION       0x0080
+
+#define CARD_PA_DEFAULT_DIRECTIONS  0x0000
+#define CARD_PB_DEFAULT_DIRECTIONS  0x0070
+
+#define CARD_PA_DEFAULT_DATA        0x0000
+#define CARD_PB_DEFAULT_DATA        (HARDWARE_RESET_DISABLE | \
+                                     SOFTWARE_OVERRIDE_1_DISABLE | \
+                                     SOFTWARE_OVERRIDE_2_DISABLE)
+
+/* these are specific to the card and are not required */
+#define HARDWARE_RESET_ENABLE       0x0000
+#define HARDWARE_RESET_DISABLE      0x0010
+
+#define SOFTWARE_OVERRIDE_1_ENABLE  0x0000
+#define SOFTWARE_OVERRIDE_1_DISABLE 0x0040
+#define SOFTWARE_OVERRIDE_2_ENABLE  0x0000
+#define SOFTWARE_OVERRIDE_2_DISABLE 0x0020
+
+/*
+ * Card Specific Devices, these are not required. Add what ever you
+ * like here.
+ */
+
+/* Write */
+#define WRITE_REGISTER_8(address, data) \
+                 *((rtems_unsigned8 *) (address)) = ((rtems_unsigned8) (data))
+#define WRITE_REGISTER_16(address, data) \
+                 *((rtems_unsigned16 *) (address)) = ((rtems_unsigned16) (data))
+#define WRITE_REGISTER_32(address, data) \
+                 *((rtems_unsigned32 *) (address)) = ((rtems_unsigned32) (data))
+/* Read */
+#define READ_REGISTER_8(address, data) data = *((rtems_unsigned8 *) (address))
+#define READ_REGISTER_16(address, data) data = *((rtems_unsigned16 *) (address))
+#define READ_REGISTER_32(address, data) data = *((rtems_unsigned32 *) (address))
+
+/* CS2 : Peripherials */
+#define PERIPHERIALS_BASE         (CSEL_2_BASE)
+
+#define STATUS_REGISTER_BASE      (PERIPHERIALS_BASE + 0x00000000)
+
+#define PERIPHERIALS_SIZE         (0x00040000)
+
+#define LEDS_BASE                 (PERIPHERIALS_BASE + 0x00004000)
+#define MSC_BASE                  (PERIPHERIALS_BASE + 0x00008000)
+#define SPARE_1_BASE              (PERIPHERIALS_BASE + 0x0000C000)
+#define DISPLAY_BASE              (PERIPHERIALS_BASE + 0x00010000)
+#define PIO_INT_BASE              (PERIPHERIALS_BASE + 0x00014000)
+#define UART_BASE                 (PERIPHERIALS_BASE + 0x00018000)
+#define PIA_BASE                  (PERIPHERIALS_BASE + 0x0001C000)
+
+#define LED_1         0x0002
+#define LED_1_GREEN   0xFFFD                  
+#define LED_1_RED     0xFFFF
+#define LED_1_OFF     0xFFFC       
+
+#define LED_2         0x0001
+#define LED_2_GREEN   0xFFFE    
+#define LED_2_RED     0xFFFF
+#define LED_2_OFF     0xFFFC
+
+#define LED_3         0x0000
+#define LED_3_GREEN   0xFFFC    
+#define LED_3_RED     0xFFFC
+#define LED_3_OFF     0xFFFC
+
+#define LED_4         0x0000
+#define LED_4_GREEN   0xFFFC    
+#define LED_4_RED     0xFFFC
+#define LED_4_OFF     0xFFFC
+
+#define LED_5         0x0000
+#define LED_5_GREEN   0xFFFC    
+#define LED_5_RED     0xFFFC
+#define LED_5_OFF     0xFFFC
+
+#define LED_6         0x0000
+#define LED_6_GREEN   0xFFFC    
+#define LED_6_RED     0xFFFC
+#define LED_6_OFF     0xFFFC
+
+#define LED_7         0x0000
+#define LED_7_GREEN   0xFFFC    
+#define LED_7_RED     0xFFFC
+#define LED_7_OFF     0xFFFC
+
+#define LED_8         0x0000
+#define LED_8_GREEN   0xFFFC    
+#define LED_8_RED     0xFFFC
+#define LED_8_OFF     0xFFFC
+
+#define MAKE_LED(L1, L2, L3, L4) ((L1 & LED_1) | (L2 & LED_2) | (L3 & LED_3) | (L4 & LED_4))
+
+#define LED_CONTROL(L1, L2, L3, L4, L5, L6, L7, L8) \
+            WRITE_REGISTER_16(LEDS_BASE, MAKE_LED(L1, L2, L3, L4))
+
+ /* update the display, needs a long word */
+#define UPDATE_DISPLAY(LongWordPtr) \
+         ( WRITE_REGISTER_16(DISPLAY_BASE, *(((rtems_unsigned8 *) LongWordPtr) + 3)), \
+           WRITE_REGISTER_16(DISPLAY_BASE + 2, *(((rtems_unsigned8 *) LongWordPtr) + 2)), \
+           WRITE_REGISTER_16(DISPLAY_BASE + 4, *(((rtems_unsigned8 *) LongWordPtr) + 1)), \
+           WRITE_REGISTER_16(DISPLAY_BASE + 6, *((rtems_unsigned8 *) LongWordPtr)) )
+
+/* make a better test, say switches */
+#if defined(GDB_MONITOR_ACTIVE)
+#define GDB_RUN_MONITOR() (1 == 1)
+#else
+#define GDB_RUN_MONITOR() (1 == 0)
+#endif
+                   
+#if __cplusplus
+}
+#endif
+#endif
diff --git a/c/src/lib/libbsp/m68k/ods68302/include/bsp.h b/c/src/lib/libbsp/m68k/ods68302/include/bsp.h
new file mode 100644
index 0000000000..f2d2ec397b
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/bsp.h
@@ -0,0 +1,139 @@
+/*  bsp.h
+ *
+ *  This include file contains all board IO definitions.
+ *
+ *  XXX : put yours in here
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __GEN68302_BSP_h
+#define __GEN68302_BSP_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <console.h>
+#include <iosupp.h>
+#include <clockdrv.h>
+#include <m68302.h>
+
+#if defined(VARIANT)
+
+#define __bsp_cat(x, y) x ## y
+#define __bsp_xcat(x, y) __bsp_cat(x, y)
+#define __bsp_str(s) #s
+#define __bsp_xstr(s) __bsp_str(s)
+
+#define __BSP_HEADER_FILE__ __bsp_xcat(VARIANT, .h)
+#define __BSP_HEADER_FILE_STR__ __bsp_xstr(__BSP_HEADER_FILE__)
+
+#include __BSP_HEADER_FILE_STR__
+#endif
+  
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Stuff for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 )
+
+#define Cause_tm27_intr()
+
+#define Clear_tm27_intr()
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp=123; \
+    asm volatile( "0: \
+                     nbcd      %0 ; \
+                     nbcd      %0 ; \
+                     dbf       %1,0b" \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* Constants */
+
+#define RAM_START RAM_BASE
+#define RAM_END   (RAM_BASE + RAM_SIZE)
+
+/* Structures */
+
+#ifdef GEN68302_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/*
+ *  Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+ 
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * How many libio files we want
+ */
+
+#define BSP_LIBIO_MAX_FDS       20
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr_entry M68Kvec[];   /* vector table address */
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr_entry set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/m68k/ods68302/include/coverhd.h b/c/src/lib/libbsp/m68k/ods68302/include/coverhd.h
new file mode 100644
index 0000000000..7b69ec046b
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/coverhd.h
@@ -0,0 +1,115 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C.  These are used in the
+ *  Timing Test Suite to ignore the overhead required to pass arguments
+ *  to directives.  On some CPUs and/or target boards, this overhead
+ *  is significant and makes it difficult to distinguish internal
+ *  RTEMS execution time from that used to call the directive.
+ *  This file should be updated after running the C overhead timing
+ *  test.  Once this update has been performed, the RTEMS Time Test
+ *  Suite should be rebuilt to account for these overhead times in the
+ *  timing results.
+ *
+ *  NOTE:  If these are all zero, then the times reported include all
+ *         all calling overhead including passing of arguments.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      14
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        11
+#define CALLING_OVERHEAD_TASK_CREATE               22
+#define CALLING_OVERHEAD_TASK_IDENT                17
+#define CALLING_OVERHEAD_TASK_START                18
+#define CALLING_OVERHEAD_TASK_RESTART              15
+#define CALLING_OVERHEAD_TASK_DELETE               12
+#define CALLING_OVERHEAD_TASK_SUSPEND              12
+#define CALLING_OVERHEAD_TASK_RESUME               12
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         16
+#define CALLING_OVERHEAD_TASK_MODE                 15
+#define CALLING_OVERHEAD_TASK_GET_NOTE             16
+#define CALLING_OVERHEAD_TASK_SET_NOTE             16
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            31
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           11
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           17
+#define CALLING_OVERHEAD_CLOCK_GET                 32
+#define CALLING_OVERHEAD_CLOCK_SET                 31
+#define CALLING_OVERHEAD_CLOCK_TICK                8
+
+#define CALLING_OVERHEAD_TIMER_CREATE              13
+#define CALLING_OVERHEAD_TIMER_IDENT               12
+#define CALLING_OVERHEAD_TIMER_DELETE              14
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          19
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           39
+#define CALLING_OVERHEAD_TIMER_RESET               12
+#define CALLING_OVERHEAD_TIMER_CANCEL              12
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          18
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           12
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          17
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          17
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         12
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      18
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       17
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      12
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        14
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      14
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   17
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     19
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       14
+
+#define CALLING_OVERHEAD_EVENT_SEND                15
+#define CALLING_OVERHEAD_EVENT_RECEIVE             18
+#define CALLING_OVERHEAD_SIGNAL_CATCH              14
+#define CALLING_OVERHEAD_SIGNAL_SEND               14
+#define CALLING_OVERHEAD_PARTITION_CREATE          23
+#define CALLING_OVERHEAD_PARTITION_IDENT           17
+#define CALLING_OVERHEAD_PARTITION_DELETE          12
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      15
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   15
+#define CALLING_OVERHEAD_REGION_CREATE             23
+#define CALLING_OVERHEAD_REGION_IDENT              14
+#define CALLING_OVERHEAD_REGION_DELETE             12
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        21
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     15
+#define CALLING_OVERHEAD_PORT_CREATE               20
+#define CALLING_OVERHEAD_PORT_IDENT                14
+#define CALLING_OVERHEAD_PORT_DELETE               12
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 18
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 18
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             18
+#define CALLING_OVERHEAD_IO_OPEN                   18
+#define CALLING_OVERHEAD_IO_CLOSE                  18
+#define CALLING_OVERHEAD_IO_READ                   18
+#define CALLING_OVERHEAD_IO_WRITE                  18
+#define CALLING_OVERHEAD_IO_CONTROL                18
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      11
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     13
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      14
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     12
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     12
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     14
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  8
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/m68k/ods68302/include/crc.h b/c/src/lib/libbsp/m68k/ods68302/include/crc.h
new file mode 100644
index 0000000000..6d307599f0
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/crc.h
@@ -0,0 +1,26 @@
+/*****************************************************************************/
+/*
+  $Id$
+
+   CRC 16 Calculate Interface
+
+*/
+/*****************************************************************************/
+
+#ifndef _CRC_H_
+#define _CRC_H_
+
+ /* ----
+      F U N C T I O N S
+  */
+#if __cplusplus
+extern "C" 
+{
+#endif
+
+rtems_unsigned16 calc_crc(void *data, rtems_unsigned32 count);
+
+#if __cplusplus
+}
+#endif
+#endif
diff --git a/c/src/lib/libbsp/m68k/ods68302/include/debugport.h b/c/src/lib/libbsp/m68k/ods68302/include/debugport.h
new file mode 100644
index 0000000000..a54756e514
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/debugport.h
@@ -0,0 +1,42 @@
+/*****************************************************************************/
+/*
+  $Id$
+
+  Debug Port Support
+
+*/
+/*****************************************************************************/
+
+#if !defined(_DEBUGPORT_H_)
+ #define _DEBUGPORT_H_
+
+#if __cplusplus
+extern "C" 
+{
+#endif
+
+  /* normall automatic, only need when re-initialising */
+  void debug_port_initialise(void);
+  
+  unsigned char debug_port_status(const unsigned char status);
+  unsigned char debug_port_in(void);
+  void debug_port_out(const unsigned char character); 
+
+  void debug_port_write(const char *buffer);
+  void debug_port_write_buffer(const char *buffer, unsigned int size);
+
+  void debug_port_write_hex_uint(const unsigned int value);
+  void debug_port_write_hex_ulong(const unsigned long value);
+  
+   /*
+    * special banner message for CPU specific boot code,
+    * initialises the debug port
+    */
+  void debug_port_banner(void);
+  void debug_port_printf(const char *format, ...);
+
+#if __cplusplus
+}
+#endif
+
+#endif
diff --git a/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h b/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h
new file mode 100644
index 0000000000..d6eb37ccda
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h
@@ -0,0 +1,34 @@
+/*****************************************************************************/
+/*
+  $Id$
+  
+  M68302 Scc Polled Uart Support
+
+ */
+/*****************************************************************************/
+
+#if !defined(_M68302SCC_H_)
+#define _M68302SCC_H_
+
+#if __cplusplus
+extern "C" 
+{
+#endif
+
+#define SCC_4800    (0)
+#define SCC_9600    (1)
+#define SCC_19200   (2)
+#define SCC_38400   (3)
+#define SCC_57600   (4)
+#define SCC_115700  (5)
+  
+void scc_initialise(int channel, int baud_rate, int lf_translate);
+unsigned char scc_status(int channel, const unsigned char status);
+unsigned char scc_in(int channel);
+void scc_out(int channel, const unsigned char character); 
+
+#if __cplusplus
+}
+#endif
+
+#endif