MVME167 BSP submitted by Charles Gauthier <Charles.Gauthier@iit.nrc.ca>.

5 files changed, 577 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/Makefile.in b/c/src/lib/libbsp/m68k/mvme167/startup/Makefile.in
new file mode 100644
index 0000000000..2d24607aaa
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/Makefile.in
@@ -0,0 +1,53 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@:@srcdir@/../../shared:@srcdir@/../../../shared
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/startup.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=bspclean bsplibc bsppost bspstart main page_table sbrk setvec
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+SRCS=$(srcdir)/linkcmds $(C_FILES) $(H_FILES)
+OBJS=$(C_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+	$(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib
+
diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c b/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c
new file mode 100644
index 0000000000..753c378cae
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c
@@ -0,0 +1,81 @@
+/*  bspclean.c
+ *
+ *  These routines return control to 167Bug after a normal exit from the
+ *  application.
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  Modifications of respective RTEMS files:
+ *  Copyright (c) 1998, National Research Council of Canada
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <page_table.h>
+
+/*
+ *  bsp_return_to_monitor_trap
+ *
+ *  Switch the VBR back to ROM and make a .RETURN syscall to return control to
+ *  167 Bug. If 167Bug ever returns, restart the application.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  Return values: NONE
+ */
+static void bsp_return_to_monitor_trap( void )
+{
+  extern void start( void );
+
+  register volatile void *start_addr;
+
+  page_table_teardown();
+
+  lcsr->intr_ena = 0;               /* disable interrupts */
+  m68k_set_vbr(0xFFE00000);         /* restore 167Bug vectors */
+  asm volatile( "trap   #15         /* trap to 167Bug */
+                 .short 0x63" );    /* return to 167Bug (.RETURN) */
+  
+  /* restart program */
+  start_addr = start;
+  asm volatile( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) );
+}
+
+/*
+ *  bsp_cleanup
+ *
+ *  This code was copied from other MC680x0 MVME BSPs.
+ *  Our guess is that someone was concerned about the CPU no longer being in
+ *  supervisor mode when they got here. This function forces the CPU back to
+ *  supervisor mode so the VBR may be changed. It places the address of the
+ *  function that makes a 167Bug .RETURN syscall in the trap 13 entry in the
+ *  exception vector, and then issues a trap 13 call. It is also possible that
+ *  the code was copied from some other OS that does run tasks in user mode.
+ *  In any case, it appears to be a bit of paranoia, and could lead to 
+ *  problems if 167Bug is invoked before we get to switch the VBR back to
+ *  167Bug because trap 13 is documented as being reserved for the internal
+ *  use of the debugger.
+ *
+ *  Prototyped in rtems/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  Return values: DOES NOT RETURN
+ */
+void bsp_cleanup( void )
+{
+   M68Kvec[ 45 ] = bsp_return_to_monitor_trap;
+   asm volatile( "trap #13" );
+}
diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c
new file mode 100644
index 0000000000..e4630e808e
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c
@@ -0,0 +1,201 @@
+/*  bspstart.c
+ *
+ *  This set of routines starts the application. It includes application,
+ *  board, and monitor specific initialization and configuration. The generic
+ *  CPU dependent initialization has been performed before any of these are
+ *  invoked.
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  Modifications of respective RTEMS files:
+ *  Copyright (c) 1998, National Research Council of Canada
+ *
+ *  $Id$
+ */
+ 
+
+#include <bsp.h>
+#include <page_table.h>
+#include <fatal.h>
+#include <rtems/libio.h>
+ 
+#include <libcsupport.h>
+ 
+#include <string.h>
+ 
+
+/*
+ *  The original table from the application (in ROM) and our copy of it with
+ *  some changes. Configuration is defined in <confdefs.h>. Make sure that
+ *  our configuration tables are uninitialized so that they get allocated in
+ *  the .bss section (RAM).
+ */
+extern rtems_configuration_table Configuration;
+rtems_configuration_table BSP_Configuration;
+rtems_extensions_table user_extension_table;
+
+rtems_cpu_table Cpu_table;
+
+/*
+ *  Use the shared implementations of the following routines.
+ *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
+ *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
+ */
+void bsp_postdriver_hook( void );
+void bsp_libc_init( void *, unsigned32, int );
+
+
+/*
+ *  bsp_pretasking_hook
+ *
+ *  Called when RTEMS initialization is complete but before interrupts and
+ *  tasking are enabled. Used to setup libc and install any BSP extensions.
+ *
+ *  Must not use libc (to do io) from here, since drivers are not yet
+ *  initialized.
+ *
+ *  Installed in the rtems_cpu_table defined in 
+ *  rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from
+ *  rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  Return values: NONE
+ */
+void bsp_pretasking_hook( void )
+{    
+  /* 
+   *  These are assigned addresses in the linkcmds file for the BSP. This
+   *  approach is better than having these defined as manifest constants and
+   *  compiled into the kernel, but it is still not ideal when dealing with
+   *  multiprocessor configuration in which each board as a different memory
+   *  map. A better place for defining these symbols might be the makefiles.
+   *  Consideration should also be given to developing an approach in which
+   *  the kernel and the application can be linked and burned into ROM
+   *  independently of each other.
+   */
+  extern unsigned char _HeapStart, _HeapEnd;
+
+  bsp_libc_init(&_HeapStart, &_HeapEnd - &_HeapStart, 0);
+
+#ifdef RTEMS_DEBUG
+    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+
+
+/*
+ *  bsp_start()
+ *
+ *  Board-specific initialization code. Called from the generic boot_card()
+ *  function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
+ *  does some of the board independent initialization. It is called from the
+ *  generic MC680x0 entry point _start() defined in
+ *  rtems/c/src/lib/start/m68k/start.s
+ *
+ *  _start() has set up a stack, has zeroed the .bss section, has turned off
+ *  interrupts, and placed the processor in the supervisor mode. boot_card()
+ *  has left the processor in that state when bsp_start() was called.
+ *
+ *  RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
+ *  ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
+ *  ADDRESSES. Software-controlled address translation would be required
+ *  otherwise.
+ *
+ *  ASSUMES THAT 167BUG IS PRESENT TO CATCH ANY EXCEPTIONS DURING
+ *  INITIALIZATION.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  Return values: NONE
+ */
+void bsp_start( void )
+{
+  extern void *_WorkspaceBase;
+  extern m68k_isr_entry M68Kvec[];
+  
+  m68k_isr_entry *rom_monitor_vector_table;
+  int index;
+
+  /*
+   *  167Bug Vectors are at 0xFFE00000
+   */
+  rom_monitor_vector_table = (m68k_isr_entry *)0xFFE00000;
+  m68k_set_vbr( rom_monitor_vector_table );
+
+
+  /* 
+   *  Copy 167Bug Bus Error handler into our exception vector. All 167Bug
+   *  exception vectors are the same and point to the generalized exception
+   *  handler. The bus error handler is the one that Motorola says to copy
+   *  (p. 2-13, Debugging Package for Motorola 68K CISC CPUs User's Manual
+   *  68KBUG/D1A3, October 1993).
+   */
+  for ( index=2 ; index<=255 ; index++ )
+    M68Kvec[ index ] = rom_monitor_vector_table[ 2 ];
+
+  /* Any exceptions during initialization should be trapped by 167Bug */
+  m68k_set_vbr( &M68Kvec );
+
+  /*
+   *  You may wish to make the VME arbitration round-robin here, currently
+   *  we leave it as it is.
+   */
+
+  /* Set the Interrupt Base Vectors */
+  lcsr->vector_base = (VBR0 << 28) | (VBR1 << 24);
+
+  /* 
+   *  Initialize address translation
+   *  May need to pass the multiprocessor configuration table.
+   */
+  page_table_init( &Configuration );
+
+  /* We only use a hook to get the C library initialized. */
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+  Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
+  Cpu_table.interrupt_stack_size = 4096; /* Must match value in start.s */
+  
+  /* 
+   *  If the application has not overriden the default User_extension_table,
+   *  supply one with our own fatal error handler that returns control to
+   *  167Bug.
+   */
+  if ( BSP_Configuration.User_extension_table == NULL ) {
+    user_extension_table.fatal = bsp_fatal_error_occurred;
+    BSP_Configuration.User_extension_table = &user_extension_table;
+  }
+  
+  /*
+   *  Need to "allocate" the memory for the RTEMS Workspace and
+   *  tell the RTEMS configuration where it is.  This memory is
+   *  not malloc'ed.  It is just "pulled from the air".
+   */
+  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
+
+  /*
+   *  Increase the number of semaphores that can be created on this node. The
+   *  termios package requires one semaphore to protect the list of termios-
+   *  capable terminals, and up to four semaphores per termios-capable
+   *  terminal (add calls here as required). The maximum number of semaphores
+   *  must be set before returning to boot_card(), which will call
+   *  rtems_initialize_executive_early(). This latter function eventually
+   *  calls _RTEMS_API_Initialize(), which in turn calls
+   *  _Semaphore_Manager_initialization(), which allocates the space for the
+   *  maximum number of semaphores in the object table. These calls occur
+   *  before the call to the predriver hook and the calls to the device
+   *  initialization callbacks. Hence, we must do this here.
+   */
+  console_reserve_resources( &BSP_Configuration );
+}
diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds b/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds
new file mode 100644
index 0000000000..a1f285a09d
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds
@@ -0,0 +1,103 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the Motorola MVME167 board.
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  Modifications of respective RTEMS file:
+ *  Copyright (c) 1998, National Research Council of Canada
+ *
+ *  $Id$
+ */
+
+/* Base address and size of RAM on the MVME167 */
+
+RAM_SIZE = 4M;
+RAM_START = 0x00800000;
+RAM_END = RAM_START + RAM_SIZE;
+
+/*
+ * Declare some sizes.
+ * XXX: The assignment of ". += XyzSize;" fails in older gld's if the
+ *      number used there is not constant.  If this happens to you, edit
+ *      the lines marked XXX below to use a constant value.
+ */
+HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000;
+StackSize = DEFINED(StackSize) ? StackSize : 0x1000;
+
+MEMORY
+{
+    ram : org = 0x00800000, l = 4M
+}
+
+SECTIONS
+{
+    .text 0x00800000 :
+    {
+  		text_start = . ;
+  		*(.text)
+  		. = ALIGN (16);
+  
+  		*(.eh_fram)
+  		. = ALIGN (16);
+  		
+  		*(.gcc_exc)
+  		. = ALIGN (16);
+  
+  		/*
+  		 * C++ constructors
+  		 */
+  		__CTOR_LIST__ = .;
+  		LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
+  		*(.ctors)
+  		LONG(0)
+  		__CTOR_END__ = .;
+  		__DTOR_LIST__ = .;
+  		LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
+  		*(.dtors)
+  		LONG(0)
+  		__DTOR_END__ = .;
+  		etext = ALIGN( 0x10 ) ;
+    } >ram
+
+    .data ADDR( .text ) + SIZEOF( .text ):
+    {
+        data_start = . ;
+        *(.data)
+        edata = ALIGN( 0x10 ) ;
+    } >ram
+
+    .bss ADDR( .data ) + SIZEOF( .data ):
+    {
+        bss_start = . ;
+        *(.bss)
+        *(COMMON)
+        end = . ;
+        _end = . ;
+
+		_HeapStart = .;
+		__HeapStart	= .;
+		. += HeapSize;	/* XXX -- Old gld can't	handle this	*/
+		_HeapEnd = .;
+		__HeapEnd = .;
+		_StackStart = .;
+		__StackStart = .;
+		. += StackSize;	/* XXX -- Old gld can't	handle this	*/
+		/* . +=	0x10000; */	/* HeapSize	for	old	gld	*/
+		/* . +=	0x1000;	 */	/* StackSize for old gld */
+		. =	ALIGN (16);
+		_StackEnd = .;
+		__StackEnd = .;
+		stack_init = .;
+		clear_end =	.;
+
+		_WorkspaceBase = .;
+		__WorkspaceBase	= .;
+    } >ram
+}
diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c b/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c
new file mode 100644
index 0000000000..5d44f3159b
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c
@@ -0,0 +1,139 @@
+/*  page_table.c
+ *
+ *  The code submitted by Eric Vaitl <vaitl@viasat.com> for the MVME162 appears
+ *  to be for a uniprocessor implementation. The function that sets up the
+ *  page tables, page_table_init(), is not data driven. For all processors, it
+ *  sets up page tables to map virtual addresses from 0x20000 to 0x3FFFFF to
+ *  physical addresses 0x20000 to 0x3FFFFF. This presumably maps a subset of
+ *  a local 4 MB space, which is probably the amount of RAM on Eric Vailt's
+ *  MVME162.
+ *
+ *  It is possible to set up the various bus bridges in the MVME167s to create
+ *  a flat physical address space across multiple boards, i.e., it is possible
+ *  for each MVME167 in a multiprocessor system to access a given memory
+ *  location using the same physical address, whether that location is in local
+ *  or VME space. Addres translation can be set up so that each virtual address
+ *  maps to its corresponding physical address, e.g. virtual address 0x12345678
+ *  is mapped to physical address 0x12345678. With this mapping, the MMU is
+ *  only used to control the caching modes for the various regions of memory.
+ *  Mapping the virtual addresses to their corresponding physical address makes
+ *  it unnecessary to map addresses under software control during the 
+ *  initialization of RTEMS, before address translation is turned on.
+ *
+ *  With the above approach, address translation may be set up either with the
+ *  transparent address translation registers, or with page tables. If page
+ *  tables are used, a more efficient use of page table space can be achieved
+ *  by sharing the page tables between processors. The entire page table tree
+ *  can be shared, or each processor can hold a private copy of the top nodes
+ *  which point to leaf nodes stored on individual processors.
+ *
+ *  In this port, only the transparent address translation registers are used.
+ *  We map the entire virtual range from 0x0 to 0x7FFFFFFF to the identical
+ *  physical range 0x0 to 0x7FFFFFFF. We rely on the hardware to signal bus
+ *  errors if we address non-existent memory within this range. Our two
+ *  MVME167s are configured to exist at physical addresses 0x00800000 to
+ *  0x00BFFFFF and 0x00C00000 to 0x00FFFFFF respectively. We map the space
+ *  from 0x0 to 0x7FFFFFFF as copyback, unless jumper J1-5 is removed, in
+ *  which case we map as writethrough. If jumper J1-7 is removed, the data
+ *  cache is NOT enabled. If jumper J1-6 is removed, the instruction cache
+ *  is not enabled.
+ *
+ *  Copyright (c) 1998, National Research Council of Canada
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <page_table.h>                 /* Nothing in here for us */
+
+/*
+ *  page_table_init
+ *  
+ *  Map the virtual range 0x00000000--0x7FFFFFFF to the physical range
+ *  0x00000000--0x7FFFFFFF. Rely on the hardware to raise exceptions when
+ *  addressing non-existent memory. Use only the transparent translation
+ *  registers (for now).
+ *
+ *  On all processors, the local virtual address range 0xFF000000--0xFFFFFFFF 
+ *  is mapped to the physical address range 0xFF000000--0xFFFFFFFF as
+ *  caching disabled, serialized access.
+ *
+ *  Input parameters:
+ *    config_table - ignored for now
+ *
+ *  Output parameters: NONE
+ *
+ *  Return values: NONE
+ */
+void page_table_init(
+  rtems_configuration_table *config_table
+)
+{
+  unsigned char j1;               /* State of J1 jumpers */
+  register unsigned long dtt0;    /* Content of dtt0 */
+  register unsigned long cacr;    /* Content of cacr */
+  
+  /*
+   *  Logical base addr = 0x00    map starting at 0x00000000
+   *  Logical address mask = 0x7F map up to 0x7FFFFFFF
+   *  E = 0b1                     enable address translation
+   *  S-Field = 0b1X              ignore FC2 when matching
+   *  U1, U0 = 0b00               user page attributes not used
+   *  CM = 0b01                   cachable, writethrough
+   *  W = 0b0                     read/write access allowed
+   */
+  dtt0 = 0x007FC020;
+  
+  cacr = 0x80008000;              /* Data and instruction cache on */
+  
+  /* Read the J1 header */
+  j1 = (unsigned char)(lcsr->vector_base & 0xFF);
+  
+  if ( j1 & 0x80 )
+    /* Jumper J1-7 if off, disable data caching */
+    cacr &= 0x7FFFFFFF;
+      
+  if ( j1 & 0x40 )
+    /* Jumper J1-6 if off, disable instruction caching */
+    cacr &= 0xFFFF7FFF;
+      
+  if ( j1 & 0x20 )
+    /* Jumper J1-5 is off, enable writethrough caching */
+    dtt0 &= 0xFFFFFF9F;
+  
+  /* do it ! */
+  asm volatile("movec %0, %%tc    /* turn off paged address translation */
+                movec %0, %%cacr  /* disable both caches */
+                cinva %%bc        /* clear both caches */
+                movec %1,%%dtt0   /* block address translation on */
+                movec %1,%%itt0
+                movec %2,%%dtt1
+                movec %2,%%itt1
+                movec %3,%%cacr"  /* data cache on */
+	  :: "d" (0), "d" (dtt0), "d" (0xFF00C040), "d" (cacr));
+}
+
+ 
+/*
+ *  page_table_teardown
+ *
+ *  Turn off paging. Turn off the cache. Flush the cache. Tear down
+ *  the transparent translations.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  Return values: NONE
+ */
+void page_table_teardown( void )
+{
+  asm volatile ("movec %0,%%tc
+                 movec %0,%%cacr
+                 cpusha %%bc
+                 movec %0,%%dtt0
+                 movec %0,%%itt0
+                 movec %0,%%dtt1
+                 movec %0,%%itt1"
+    :: "d" (0) );
+}