diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-01-11 17:34:20 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-01-11 17:34:20 +0000 |
commit | 0dd1d44582dd2b39a791aa60f76358ff9bba8cd8 (patch) | |
tree | 6be7a7b7d21975f08ba16993958e4bca5177dc76 /c/src/lib/libbsp/m68k/mvme162/clock | |
parent | Patch from Emmanuel Raguet <raguet@crf.canon.fr> to correct macro (diff) | |
download | rtems-0dd1d44582dd2b39a791aa60f76358ff9bba8cd8.tar.bz2 |
Removed old hack of using Configuration Table entry ticks_per_timeslice
being set to 0 to indicate that there should be no Clock Tick. This
was used by the Timing Tests to avoid clock tick overhead perturbing
execution times. Now the Timing Tests simply leave the Clock Tick
Driver out of the Device Driver Table.
Diffstat (limited to 'c/src/lib/libbsp/m68k/mvme162/clock')
-rw-r--r-- | c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c index dc91350612..7cde85513f 100644 --- a/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c @@ -71,21 +71,18 @@ void Install_clock(rtems_isr_entry clock_isr ) Clock_driver_ticks = 0; Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; - if ( BSP_Configuration.ticks_per_timeslice ) { - Old_ticker = - (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); - lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ - lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ - lcsr->timer_cmp_2 = MS_COUNT; - lcsr->timer_cnt_2 = 0; /* clear counter */ - lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */ - /* clear-overflow-cnt */ - - lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */ - lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */ - - atexit( Clock_exit ); - } + Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); + lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ + lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ + lcsr->timer_cmp_2 = MS_COUNT; + lcsr->timer_cnt_2 = 0; /* clear counter */ + lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */ + /* clear-overflow-cnt */ + + lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */ + lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */ + + atexit( Clock_exit ); } void Clock_exit( void ) |