new file submitted by Dominique le Campion.

10 files changed, 1243 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/m68k/mvme147s/README b/c/src/lib/libbsp/m68k/mvme147s/README
new file mode 100644
index 0000000000..132f214777
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/README
@@ -0,0 +1,92 @@
+#
+#  $Id$
+#
+
+Notes about the MVME147S bsp
+
+MVME147 port for TNI - Telecom Bretagne
+by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+May 1996
+
+
+This bsp is essentially based on the mvme136 bsp,
+and is only an extention of the MVME147 bsp. There
+are slight differences in the VMEchips used in the MVME147S and
+the MVME147 that should prevent the shmsupport and the startup
+code from running on a MVME147.
+
+Summary of the modifications that were made:
+
+ * include
+ 
+   - bsp.h 
+      Peripheral Channel Controller memory mapping
+      Z8530 memory mapping
+      VMEchip memory mapping
+ 
+ * startup
+ 
+   - bspstart.c
+      main () setup for VME roundrobin mode
+	      setup for the PCC interrupt vector base 
+              setup of the VME shared memory
+   - bspclean.c
+      bsp_cleanup () disable timer 1 & 2 interruptions
+   - linkcmds set the RAM start (0x7000) and size (4Meg - 0x7000)
+   - setvec.c unchanged
+   - sbrk.c unchanged
+ 
+ * console
+ 
+   - console.c taken from the dmv152 bsp (Zilog Z8530)
+               with no modification
+ 
+ * clock
+ 
+   - ckinit.c entirely rewritten for the PCC tick timer 2
+ 
+ * timer
+ 
+   - timerisr.s and timer.c 
+     entirely rewritten for the PCC tick timer 1
+     now gives results un 6.25 us units (mininum timer delay,
+     suprising big grain)
+ 
+ * times
+ 
+   - updated results for the mvme147 (beware of the 6.25 us grain)
+
+ * shmsupp :
+   Specific to the S version of the MVME147
+   Only tested with 2 boards, in interrupt mode.
+   Uses the top 128k of the VME system controller board RAM
+   as the shared space.
+
+   - mpisr.c : uses the SIGLP interruption
+
+   - Makefile : unchanged
+
+   - getcfg.c : rewritten 
+
+   - lock.c unchanged
+
+   - addrconv.c unchanged
+
+ * Makefiles
+   
+   - unchanged
+
+
+To be done:
+
+ * update the overheads in coverhead.h 
+
+ * add support for serial ports 2,3 and 4.
+
+Other notes:
+
+ * All the timing tests and sp tests have been run except tmoverhd.
+   The test hangs during the pause (where the task should be suspended
+   until a return). Maybe the rtems_initialize_executive is no more
+   reentrant with this bsp. 
+
diff --git a/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h b/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h
new file mode 100644
index 0000000000..9a1128d5b2
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h
@@ -0,0 +1,253 @@
+/*  bsp.h
+ *
+ *  This include file contains all MVME147 board IO definitions.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  MVME147 port for TNI - Telecom Bretagne
+ *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ *  May 1996
+ *
+ *  $Id$
+ */
+
+#ifndef __MVME147_h
+#define __MVME147_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <clockdrv.h>
+#include <console.h>
+#include <iosupp.h>
+
+/* Constants */
+
+#define RAM_START 0x00007000
+#define RAM_END   0x003e0000
+#define DRAM_END  0x00400000
+  /* We leave 128k for the shared memory */
+
+  /* MVME 147 Peripheral controller chip 
+     see MVME147/D1, 3.4 */
+
+struct pcc_map {
+  /* 32 bit registers */
+  rtems_unsigned32 dma_table_address;            /* 0xfffe1000 */
+  rtems_unsigned32 dma_data_address;             /* 0xfffe1004 */
+  rtems_unsigned32 dma_bytecount;                /* 0xfffe1008 */
+  rtems_unsigned32 dma_data_holding;             /* 0xfffe100c */
+
+  /* 16 bit registers */
+  rtems_unsigned16 timer1_preload;               /* 0xfffe1010 */
+  rtems_unsigned16 timer1_count;                 /* 0xfffe1012 */
+  rtems_unsigned16 timer2_preload;               /* 0xfffe1014 */
+  rtems_unsigned16 timer2_count;                 /* 0xfffe1016 */
+
+  /* 8 bit registers */
+  rtems_unsigned8 timer1_int_control;            /* 0xfffe1018 */
+  rtems_unsigned8 timer1_control;                /* 0xfffe1019 */
+  rtems_unsigned8 timer2_int_control;            /* 0xfffe101a */
+  rtems_unsigned8 timer2_control;                /* 0xfffe101b */
+
+  rtems_unsigned8 acfail_int_control;            /* 0xfffe101c */
+  rtems_unsigned8 watchdog_control;              /* 0xfffe101d */
+
+  rtems_unsigned8 printer_int_control;           /* 0xfffe101e */
+  rtems_unsigned8 printer_control;               /* 0xfffe102f */
+
+  rtems_unsigned8 dma_int_control;               /* 0xfffe1020 */
+  rtems_unsigned8 dma_control;                   /* 0xfffe1021 */
+  rtems_unsigned8 bus_error_int_control;         /* 0xfffe1022 */
+  rtems_unsigned8 dma_status;                    /* 0xfffe1023 */
+  rtems_unsigned8 abort_int_control;             /* 0xfffe1024 */
+  rtems_unsigned8 table_address_function_code;   /* 0xfffe1025 */
+  rtems_unsigned8 serial_port_int_control;       /* 0xfffe1026 */
+  rtems_unsigned8 general_purpose_control;       /* 0xfffe1027 */
+  rtems_unsigned8 lan_int_control;               /* 0xfffe1028 */
+  rtems_unsigned8 general_purpose_status;        /* 0xfffe1029 */
+  rtems_unsigned8 scsi_port_int_control;         /* 0xfffe102a */
+  rtems_unsigned8 slave_base_address;            /* 0xfffe102b */
+  rtems_unsigned8 software_int_1_control;        /* 0xfffe102c */
+  rtems_unsigned8 int_base_vector;               /* 0xfffe102d */
+  rtems_unsigned8 software_int_2_control;        /* 0xfffe102e */
+  rtems_unsigned8 revision_level;                /* 0xfffe102f */
+};
+
+#define pcc      ((volatile struct pcc_map * const) 0xfffe1000)
+
+/* VME chip configuration registers */
+
+struct vme_lcsr_map {
+  rtems_unsigned8 unused_1;
+  rtems_unsigned8 system_controller;             /* 0xfffe2001 */
+  rtems_unsigned8 unused_2;
+  rtems_unsigned8 vme_bus_requester;             /* 0xfffe2003 */
+  rtems_unsigned8 unused_3;
+  rtems_unsigned8 master_configuration;          /* 0xfffe2005 */
+  rtems_unsigned8 unused_4;
+  rtems_unsigned8 slave_configuration;           /* 0xfffe2007 */
+  rtems_unsigned8 unused_5;
+  rtems_unsigned8 timer_configuration;           /* 0xfffe2009 */
+  rtems_unsigned8 unused_6;
+  rtems_unsigned8 slave_address_modifier;        /* 0xfffe200b */
+  rtems_unsigned8 unused_7;
+  rtems_unsigned8 master_address_modifier;       /* 0xfffe200d */
+  rtems_unsigned8 unused_8;
+  rtems_unsigned8 interrupt_handler_mask;        /* 0xfffe200f */
+  rtems_unsigned8 unused_9;
+  rtems_unsigned8 utility_interrupt_mask;        /* 0xfffe2011 */
+  rtems_unsigned8 unused_10;
+  rtems_unsigned8 utility_interrupt_vector;      /* 0xfffe2013 */
+  rtems_unsigned8 unused_11;
+  rtems_unsigned8 interrupt_request;             /* 0xfffe2015 */
+  rtems_unsigned8 unused_12;
+  rtems_unsigned8 vme_bus_status_id;             /* 0xfffe2017 */
+  rtems_unsigned8 unused_13;
+  rtems_unsigned8 bus_error_status;              /* 0xfffe2019 */
+  rtems_unsigned8 unused_14;
+  rtems_unsigned8 gcsr_base_address;             /* 0xfffe201b */
+};
+
+#define vme_lcsr      ((volatile struct vme_lcsr_map * const) 0xfffe2000)
+
+
+struct vme_gcsr_map {
+  rtems_unsigned8 unused_1;
+  rtems_unsigned8 global_0;                      /* 0xfffe2021 */
+  rtems_unsigned8 unused_2;
+  rtems_unsigned8 global_1;                      /* 0xfffe2023 */
+  rtems_unsigned8 unused_3;
+  rtems_unsigned8 board_identification;          /* 0xfffe2025 */
+  rtems_unsigned8 unused_4;
+  rtems_unsigned8 general_purpose_0;             /* 0xfffe2027 */
+  rtems_unsigned8 unused_5;
+  rtems_unsigned8 general_purpose_1;             /* 0xfffe2029 */
+  rtems_unsigned8 unused_6;
+  rtems_unsigned8 general_purpose_2;             /* 0xfffe202b */
+  rtems_unsigned8 unused_7;
+  rtems_unsigned8 general_purpose_3;             /* 0xfffe202d */
+  rtems_unsigned8 unused_8;
+  rtems_unsigned8 general_purpose_4;             /* 0xfffe202f */
+};
+
+#define vme_gcsr      ((volatile struct vme_gcsr_map * const) 0xfffe2020)
+
+
+
+#define z8530 0xfffe3001
+
+
+/* interrupt vectors - see MVME147/D1 4.14 */
+#define PCC_BASE_VECTOR        0x40 /* First user int */
+#define SCC_VECTOR             PCC_BASE_VECTOR+3
+#define TIMER_1_VECTOR         PCC_BASE_VECTOR+8
+#define TIMER_2_VECTOR         PCC_BASE_VECTOR+9  
+#define SOFT_1_VECTOR          PCC_BASE_VECTOR+10
+#define SOFT_2_VECTOR          PCC_BASE_VECTOR+11 
+
+#define VME_BASE_VECTOR        0x50
+#define VME_SIGLP_VECTOR       VME_BASE_VECTOR+1
+
+#define USE_CHANNEL_A   1                /* 1 = use channel A for console */
+#define USE_CHANNEL_B   0                /* 1 = use channel B for console */
+
+#if (USE_CHANNEL_A == 1)
+#define CONSOLE_CONTROL  0xfffe3002
+#define CONSOLE_DATA     0xfffe3003
+#elif (USE_CHANNEL_B == 1)
+#define CONSOLE_CONTROL  0xfffe3000
+#define CONSOLE_DATA     0xfffe3001
+#endif
+
+
+
+#define FOREVER       1                  /* infinite loop */
+
+#ifdef M147_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Use the MPCSR vector for the MVME147
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), \
+						   SOFT_1_VECTOR, 1 )
+
+#define Cause_tm27_intr()  pcc->software_int_1_control = 0x0c
+  /* generate level 4 sotware int. */
+
+#define Clear_tm27_intr()  pcc->software_int_1_control = 0x00
+
+#define Lower_tm27_intr()
+
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr_entry M68Kvec[];   /* vector table address */
+
+/*
+ *  Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+ 
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * How many libio files we want
+ */
+
+#define BSP_LIBIO_MAX_FDS       20
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr_entry set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
+
diff --git a/c/src/lib/libbsp/m68k/mvme147s/include/coverhd.h b/c/src/lib/libbsp/m68k/mvme147s/include/coverhd.h
new file mode 100644
index 0000000000..7497514e97
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/include/coverhd.h
@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      2
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
+#define CALLING_OVERHEAD_TASK_CREATE               3
+#define CALLING_OVERHEAD_TASK_IDENT                2
+#define CALLING_OVERHEAD_TASK_START                2
+#define CALLING_OVERHEAD_TASK_RESTART              2
+#define CALLING_OVERHEAD_TASK_DELETE               1
+#define CALLING_OVERHEAD_TASK_SUSPEND              1
+#define CALLING_OVERHEAD_TASK_RESUME               2
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         2
+#define CALLING_OVERHEAD_TASK_MODE                 2
+#define CALLING_OVERHEAD_TASK_GET_NOTE             2
+#define CALLING_OVERHEAD_TASK_SET_NOTE             2
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            4
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           2
+#define CALLING_OVERHEAD_CLOCK_GET                 5
+#define CALLING_OVERHEAD_CLOCK_SET                 4
+#define CALLING_OVERHEAD_CLOCK_TICK                1
+
+#define CALLING_OVERHEAD_TIMER_CREATE              2
+#define CALLING_OVERHEAD_TIMER_IDENT               1
+#define CALLING_OVERHEAD_TIMER_DELETE              2
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          2
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           5
+#define CALLING_OVERHEAD_TIMER_RESET               1
+#define CALLING_OVERHEAD_TIMER_CANCEL              1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          3
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          1
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           2
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          2
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       2
+
+#define CALLING_OVERHEAD_EVENT_SEND                2
+#define CALLING_OVERHEAD_EVENT_RECEIVE             2
+#define CALLING_OVERHEAD_SIGNAL_CATCH              2
+#define CALLING_OVERHEAD_SIGNAL_SEND               2
+#define CALLING_OVERHEAD_PARTITION_CREATE          3
+#define CALLING_OVERHEAD_PARTITION_IDENT           2
+#define CALLING_OVERHEAD_PARTITION_DELETE          1
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      2
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   2
+#define CALLING_OVERHEAD_REGION_CREATE             3
+#define CALLING_OVERHEAD_REGION_IDENT              2
+#define CALLING_OVERHEAD_REGION_DELETE             2
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        3
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     2
+#define CALLING_OVERHEAD_PORT_CREATE               3
+#define CALLING_OVERHEAD_PORT_IDENT                2
+#define CALLING_OVERHEAD_PORT_DELETE               1
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             2
+#define CALLING_OVERHEAD_IO_OPEN                   2
+#define CALLING_OVERHEAD_IO_CLOSE                  3
+#define CALLING_OVERHEAD_IO_READ                   2
+#define CALLING_OVERHEAD_IO_WRITE                  2
+#define CALLING_OVERHEAD_IO_CONTROL                2
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     2
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/m68k/mvme147s/shmsupp/addrconv.c b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/addrconv.c
new file mode 100644
index 0000000000..1acf985ad7
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/addrconv.c
@@ -0,0 +1,36 @@
+/*  Shm_Convert_address
+ *
+ *  This MVME147 has a "normal" view of the VME address space.
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  MVME147 port for TNI - Telecom Bretagne
+ *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ *  June 1996
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c
new file mode 100644
index 0000000000..aa70b5e65f
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c
@@ -0,0 +1,86 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the MVME147.
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  The SIGLP interrupt on the MVME147 is used as an interprocessor
+ *          interrupt.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  MVME147 port for TNI - Telecom Bretagne
+ *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ *  June 1996
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems.h>
+#include "shm.h"
+
+#define INTERRUPT 1                   /* MVME147 target supports both */
+#define POLLING   0                   /* polling and interrupt modes  */
+
+shm_config_table BSP_shm_cfgtbl;
+
+rtems_unsigned32 *BSP_int_address()
+{
+  rtems_unsigned32 id, offset;
+
+  id      = (rtems_unsigned32) vme_lcsr->gcsr_base_address;
+  offset  = (id << 4) & 0xF0;
+  offset |= 0xffff0003; /* points to GCSR global 1 */
+  return( (rtems_unsigned32 * ) offset );
+}
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+  /* A shared mem space has bee left between RAM_END and DRAM_END 
+   on the first node*/
+  if (localnode == 1)
+    BSP_shm_cfgtbl.base         = RAM_END; 
+  else
+    BSP_shm_cfgtbl.base         = DRAM_END + RAM_END;
+  BSP_shm_cfgtbl.length       = DRAM_END - RAM_END; 
+  BSP_shm_cfgtbl.format       = SHM_BIG;
+  
+  BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+  
+#ifdef NEUTRAL_BIG
+  BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+  BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+#if (POLLING==1)
+  BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+  BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+  BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+  BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+#else
+  BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
+  BSP_shm_cfgtbl.Intr.address = BSP_int_address(); /* GCSR global 1 */
+  BSP_shm_cfgtbl.Intr.value   = 0x01; /* SIGLP */
+  BSP_shm_cfgtbl.Intr.length  = BYTE;
+#endif
+
+  *shmcfg = &BSP_shm_cfgtbl;
+
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147s/shmsupp/lock.c b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/lock.c
new file mode 100644
index 0000000000..5ccc406af5
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/lock.c
@@ -0,0 +1,75 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*  void _Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+  rtems_unsigned32 *lockptr = (rtems_unsigned32 *)&lq_cb->lock;
+
+  rtems_interrupt_disable( isr_level );
+    Shm_isrstat = isr_level;
+    asm volatile( "lockit:"    : : );
+    asm volatile( "tas %0@"    : "=a" (lockptr) : "0" (lockptr) );
+    asm volatile( "bne lockit" : : );
+/* should delay */
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}
+
diff --git a/c/src/lib/libbsp/m68k/mvme147s/shmsupp/mpisr.c b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/mpisr.c
new file mode 100644
index 0000000000..fff451b1e3
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/mpisr.c
@@ -0,0 +1,46 @@
+/*  Shm_isr_mvme147()
+ *
+ *  NOTE: This routine is not used when in polling mode.  Either
+ *        this routine OR Shm_clockisr is used in a particular system.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  MVME147 port for TNI - Telecom Bretagne
+ *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ *  June 1996
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+rtems_isr Shm_isr_mvme147()
+{
+  Shm_Interrupt_count += 1;
+  rtems_multiprocessing_announce();
+  vme_gcsr->global_1 = 1; /* clear SIGLP intr */
+}
+
+/*  void _Shm_setvec( )
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ */
+
+void Shm_setvec()
+{
+  /* may need to disable intr */
+  set_vector( Shm_isr_mvme147, VME_SIGLP_VECTOR, 1 );
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c
new file mode 100644
index 0000000000..755fc87e8b
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c
@@ -0,0 +1,305 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  MVME147 port for TNI - Telecom Bretagne
+ *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ *  May 1996
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+
+#include <libcsupport.h>
+
+#include <string.h>
+#include <fcntl.h>
+
+#ifdef STACK_CHECKER_ON
+#include <stackchk.h>
+#endif
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table         BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+char *rtems_progname;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     *  Init the RTEMS libio facility to provide UNIX-like system
+     *  calls for use by newlib (ie: provide __open, __close, etc)
+     *  Uses malloc() to get area for the iops, so must be after malloc init
+     */
+
+    rtems_libio_init();
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+}
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *  Created:    95/03/10
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  NOTES:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ */
+ 
+void
+bsp_pretasking_hook(void)
+{
+    bsp_libc_init();
+ 
+#ifdef STACK_CHECKER_ON
+    /*
+     *  Initialize the stack bounds checker
+     *  We can either turn it on here or from the app.
+     */
+ 
+    Stack_check_Initialize();
+#endif
+ 
+#ifdef RTEMS_DEBUG
+    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+ 
+
+/*
+ * After drivers are setup, register some "filenames"
+ * and open stdin, stdout, stderr files
+ *
+ * Newlib will automatically associate the files with these
+ * (it hardcodes the numbers)
+ */
+ 
+void
+bsp_postdriver_hook(void)
+{
+  int stdin_fd, stdout_fd, stderr_fd;
+  int error_code;
+ 
+  error_code = 'S' << 24 | 'T' << 16;
+ 
+  if ((stdin_fd = __open("/dev/console", O_RDONLY, 0)) == -1)
+    rtems_fatal_error_occurred( error_code | 'D' << 8 | '0' );
+ 
+  if ((stdout_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
+    rtems_fatal_error_occurred( error_code | 'D' << 8 | '1' );
+ 
+  if ((stderr_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
+    rtems_fatal_error_occurred( error_code | 'D' << 8 | '2' );
+ 
+  if ((stdin_fd != 0) || (stdout_fd != 1) || (stderr_fd != 2))
+    rtems_fatal_error_occurred( error_code | 'I' << 8 | 'O' );
+}
+
+
+int main(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  m68k_isr_entry *monitors_vector_table;
+  int             index;
+  rtems_unsigned8 node_number;
+
+  if ((argc > 0) && argv && argv[0])
+    rtems_progname = argv[0];
+  else
+    rtems_progname = "RTEMS";
+
+  monitors_vector_table = (m68k_isr_entry *)0;   /* 147Bug Vectors are at 0 */
+  m68k_set_vbr( monitors_vector_table );
+
+  for ( index=2 ; index<=255 ; index++ )
+    M68Kvec[ index ] = monitors_vector_table[ 32 ];
+
+  M68Kvec[  2 ] = monitors_vector_table[  2 ];   /* bus error vector */
+  M68Kvec[  4 ] = monitors_vector_table[  4 ];   /* breakpoints vector */
+  M68Kvec[  9 ] = monitors_vector_table[  9 ];   /* trace vector */
+  M68Kvec[ 47 ] = monitors_vector_table[ 47 ];   /* system call vector */
+
+  m68k_set_vbr( &M68Kvec );
+
+  pcc->int_base_vector = PCC_BASE_VECTOR & 0xF0; 
+  /* Set the PCC int vectors base */
+  
+  /* VME shared memory configuration */
+  /* Only the first node shares its top 128k DRAM */
+
+  vme_lcsr->utility_interrupt_vector = VME_BASE_VECTOR & 0xF8;
+  /* Set VMEchip base interrupt vector */
+  vme_lcsr->utility_interrupt_mask |= 0x02;
+  /* Enable SIGLP interruption (see shm support) */
+  pcc->general_purpose_control &= 0x10;
+  /* Enable VME master interruptions */
+  
+  if (vme_lcsr->system_controller & 0x01) {
+    /* the board is system controller */
+    vme_lcsr->system_controller = 0x08; 
+    /* Make VME access round-robin */
+  }
+
+  
+  node_number = 
+    (rtems_unsigned8) 
+    (Configuration.User_multiprocessing_table->node - 1) & 0xF;
+  /* Get and store node ID, first node_number = 0 */
+  vme_gcsr->board_identification = node_number;
+
+  vme_lcsr->gcsr_base_address = node_number;
+  /* Setup the base address of this board's gcsr */
+  vme_lcsr->timer_configuration = 0x6a;
+  /* Enable VME time outs, maximum periods */
+
+  if (node_number == 0) {
+    pcc->slave_base_address = 0x01;
+    /* Set local DRAM base address on the VME bus to the DRAM size */
+
+    vme_lcsr->vme_bus_requester = 0x80;
+    while (! (vme_lcsr->vme_bus_requester & 0x40));
+    /* Get VMEbus mastership */
+    vme_lcsr->slave_address_modifier = 0xfb;
+    /* Share everything */
+    vme_lcsr->slave_configuration = 0x80;
+    /* Share local DRAM */
+    vme_lcsr->vme_bus_requester = 0x0;
+    /* release bus */
+  } else {
+    pcc->slave_base_address = 0;
+    /* Set local DRAM base address on the VME bus to 0 */
+
+    vme_lcsr->vme_bus_requester = 0x80;
+    while (! (vme_lcsr->vme_bus_requester & 0x40));
+    /* Get VMEbus mastership */
+    vme_lcsr->slave_address_modifier = 0x08;
+    /* Share only the short adress range */
+    vme_lcsr->slave_configuration = 0;
+    /* Don't share local DRAM */
+    vme_lcsr->vme_bus_requester = 0x0;
+    /* release bus */
+  }
+
+  vme_lcsr->master_address_modifier = 0;
+  /* Automatically set the address modifier */
+  vme_lcsr->master_configuration = 1;
+  /* Disable D32 transfers : they don't work on my VMEbus rack */
+
+  m68k_enable_caching();
+
+  /*
+   *  we only use a hook to get the C library initialized.
+   */
+
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+
+  Cpu_table.predriver_hook = NULL;
+
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_mpci_receive_server_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  BSP_Configuration.work_space_start = (void *)
+     (RAM_END - BSP_Configuration.work_space_size);
+
+  /*
+   * Add 1 region for the RTEMS Malloc
+   */
+
+  BSP_Configuration.RTEMS_api_configuration->maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Tell libio how many fd's we want and allow it to tweak config
+   */
+
+  rtems_libio_config(&BSP_Configuration, BSP_LIBIO_MAX_FDS);
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+
+  bsp_cleanup();
+
+  return 0;
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147s/startup/linkcmds b/c/src/lib/libbsp/m68k/mvme147s/startup/linkcmds
new file mode 100644
index 0000000000..c74db14d57
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/startup/linkcmds
@@ -0,0 +1,52 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the Motorola MVME147 boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  MVME147 port for TNI - Telecom Bretagne
+ *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ *  May 1996
+ *
+ *  $Id$
+ */
+
+MEMORY
+	{
+	ram : org = 0x7000, l = 0x3d8fff
+	}
+
+SECTIONS
+{
+        .text 0x7000 :
+	{
+	    text_start = . ;
+	    _text_start = . ;
+            *(.text)
+	    etext = ALIGN( 0x10 ) ;
+	    _etext = .;
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+	{
+	    data_start = . ;
+            _data_start = .;
+            *(.data)
+	    edata = ALIGN( 0x10 ) ;
+            _edata = .;
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+	    bss_start = . ;
+	    _bss_start = . ;
+	    *(.bss)
+	    *(COMMON)
+	    end = . ;
+	    _end = . ;
+	}
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147s/times b/c/src/lib/libbsp/m68k/mvme147s/times
new file mode 100644
index 0000000000..d1bae93265
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147s/times
@@ -0,0 +1,194 @@
+#
+#  Timing Test Suite Results for the Motorola MVME147 BSP
+#
+#  MVME147 port for TNI - Telecom Bretagne
+#  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+#  May 1996
+#
+#  $Id$
+#
+
+Board:                Motorola MVME147S
+CPU:                  Motorola MC68030 + MC68882 FPU
+Clock Speed:          20 Mhz
+Memory Configuration: DRAM w/no cache
+Wait States:          ? wait state
+
+Times Reported in:    microseconds (6.25 us grain)
+Timer Source:         MVME147 Peripheral Channel Controller tick timer
+
+Column A:             3.5.1 pre-release
+
+#                          DESCRIPTION                                 A  
+== =================================================================  ====
+ 1 rtems_semaphore_create                                               69
+   rtems_semaphore_delete                                               69
+   rtems_semaphore_obtain: available                                    44
+   rtems_semaphore_obtain: not available -- NO_WAIT                     44
+   rtems_semaphore_release: no waiting tasks                            56
+								          
+ 2 rtems_semaphore_obtain: not available -- caller blocks              125
+								          
+ 3 rtems_semaphore_release: task readied -- preempts caller            106
+								          
+ 4 rtems_task_restart: blocked task -- preempts caller                 181
+   rtems_task_restart: ready task -- preempts caller                   169
+   rtems_semaphore_release: task readied -- returns to caller           81
+   rtems_task_create                                                   169
+   rtems_task_start                                                     87
+   rtems_task_restart: suspended task -- returns to caller             106
+   rtems_task_delete: suspended task                                   169
+   rtems_task_restart: ready task -- returns to caller                 112
+   rtems_task_restart: blocked task -- returns to caller               150
+   rtems_task_delete: blocked task                                     175
+								          
+ 5 rtems_task_suspend: calling task                                     87
+   rtems_task_resume: task readied -- preempts caller                   75
+								          
+ 6 rtems_task_restart: calling task                                    112
+   rtems_task_suspend: returns to caller                                56
+   rtems_task_resume: task readied -- returns to caller                 50
+   rtems_task_delete: ready task                                       169
+								          
+ 7 rtems_task_restart: suspended task -- preempts caller               143
+								          
+ 8 rtems_task_set_priority: obtain current priority                     37
+   rtems_task_set_priority: returns to caller                           75
+   rtems_task_mode: obtain current mode                                  6
+   rtems_task_mode: no reschedule                                        6
+   rtems_task_mode: reschedule -- returns to caller                     19
+   rtems_task_mode: reschedule -- preempts caller                       75
+   rtems_task_set_note                                                  37
+   rtems_task_get_note                                                  37
+   rtems_clock_set                                                      87
+   rtems_clock_get                                                       0
+								          
+ 9 rtems_message_queue_create                                          225
+   rtems_message_queue_send: no waiting tasks                          112
+   rtems_message_queue_urgent: no waiting tasks                        112
+   rtems_message_queue_receive: available                               87
+   rtems_message_queue_flush: no messages flushed                       37
+   rtems_message_queue_flush: messages flushed                          50
+   rtems_message_queue_delete                                          106
+								          
+10 rtems_message_queue_receive: not available -- NO_WAIT                44
+   rtems_message_queue_receive: not available -- caller blocks         125
+								          
+11 rtems_message_queue_send: task readied -- preempts caller           144
+								          
+12 rtems_message_queue_send: task readied -- returns to caller         119
+								          
+13 rtems_message_queue_urgent: task readied -- preempts caller         144
+								          
+14 rtems_message_queue_urgent: task readied -- returns to caller       119
+								          
+15 rtems_event_receive: obtain current events                            0
+   rtems_event_receive: not available -- NO_WAIT                        25
+   rtems_event_receive: not available -- caller blocks                 100
+   rtems_event_send: no task readied                                    31
+   rtems_event_receive: available                                       37
+   rtems_event_send: task readied -- returns to caller                  69
+								          
+16 rtems_event_send: task readied -- preempts caller                   100
+								          
+17 rtems_task_set_priority: preempts caller                            125
+								          
+18 rtems_task_delete: calling task                                     200
+								          
+19 rtems_signal_catch                                                   19
+   rtems_signal_send: returns to caller                                 50
+   rtems_signal_send: signal to self                                    56
+   exit ASR overhead: returns to calling task                           44
+   exit ASR overhead: returns to preempting task                        75
+								          
+20 rtems_partition_create                                               81
+   rtems_region_create                                                  75
+   rtems_partition_get_buffer: available                                44
+   rtems_partition_get_buffer: not available                            44
+   rtems_partition_return_buffer                                        56
+   rtems_partition_delete                                               62
+   rtems_region_get_segment: available                                  56
+   rtems_region_get_segment: not available -- NO_WAIT                   56
+   rtems_region_return_segment: no waiting tasks                        69
+   rtems_region_get_segment: not available -- caller blocks            144
+   rtems_region_return_segment: task readied -- preempts caller        169
+   rtems_region_return_segment: task readied -- returns to caller      137
+   rtems_region_delete                                                  56
+   rtems_io_initialize                                                   0
+   rtems_io_open                                                         0
+   rtems_io_close                                                        0
+   rtems_io_read                                                         0
+   rtems_io_write                                                        0
+   rtems_io_control                                                      0
+								          
+21 rtems_task_ident                                                    375
+   rtems_message_queue_ident                                           362
+   rtems_semaphore_ident                                               394
+   rtems_partition_ident                                               362
+   rtems_region_ident                                                  369
+   rtems_port_ident                                                    362
+   rtems_timer_ident                                                   369
+   rtems_rate_monotonic_ident                                          362
+								          
+22 rtems_message_queue_broadcast: task readied -- returns to caller    131
+   rtems_message_queue_broadcast: no waiting tasks                      62
+   rtems_message_queue_broadcast: task readied -- preempts caller      156
+								          
+23 rtems_timer_create                                                   31
+   rtems_timer_fire_after: inactive                                     69
+   rtems_timer_fire_after: active                                       69
+   rtems_timer_cancel: active                                           44
+   rtems_timer_cancel: inactive                                         37
+   rtems_timer_reset: inactive                                          69
+   rtems_timer_reset: active                                            69
+   rtems_timer_fire_when: inactive                                      87
+   rtems_timer_fire_when: active                                        87
+   rtems_timer_delete: active                                           56
+   rtems_timer_delete: inactive                                         50
+   rtems_task_wake_when                                                125
+								          
+24 rtems_task_wake_after: yield -- returns to caller                    19
+   rtems_task_wake_after: yields -- preempts caller                     69
+								          
+25 rtems_clock_tick                                                     19
+								          
+26 _ISR_Disable                                                          6
+   _ISR_Flash                                                            6
+   _ISR_Enable                                                           6
+   _Thread_Disable_dispatch                                              6
+   _Thread_Enable_dispatch                                              25
+   _Thread_Set_state                                                    31
+   _Thread_Disptach (NO FP)                                             62
+   context switch: no floating point contexts                           50
+   context switch: self                                                 12
+   context switch: to another task                                      12
+   context switch: restore 1st FP task                                  56
+   fp context switch: save idle, restore idle                           87
+   fp context switch: save idle, restore initialized                    75
+   fp context switch: save initialized, restore initialized             75
+   _Thread_Resume                                                       25
+   _Thread_Unblock                                                      25
+   _Thread_Ready                                                        31
+   _Thread_Get                                                          12
+   _Semaphore_Get                                                        6
+   _Thread_Get: invalid id                                               0
+								          
+27 interrupt entry overhead: returns to interrupted task                12
+   interrupt exit overhead: returns to interrupted task                 12
+   interrupt entry overhead: returns to nested interrupt                19
+   interrupt exit overhead: returns to nested interrupt                  6
+   interrupt entry overhead: returns to preempting task                 12
+   interrupt exit overhead: returns to preempting task                  81
+								          
+28 rtems_port_create                                                    37
+   rtems_port_external_to_internal                                      31
+   rtems_port_internal_to_external                                      31
+   rtems_port_delete                                                    56
+								          
+29 rtems_rate_monotonic_create                                          44
+   rtems_rate_monotonic_period: initiate period -- returns to caller    62
+   rtems_rate_monotonic_period: obtain status                           37
+   rtems_rate_monotonic_cancel                                          56
+   rtems_rate_monotonic_delete: inactive                                62
+   rtems_rate_monotonic_delete: active                                  69
+   rtems_rate_monotonic_period: conclude periods -- caller blocks       87