diff options
| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 12:30:12 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 12:30:12 +0000 |
| commit | 95e4ef2200005d48c107f3dd1680cad3f73c8975 (patch) | |
| tree | 430ab000dee3f69c41a1743424f4dd2f014916f1 /c/src/lib/libbsp/m68k/genmcf548x | |
| parent | 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-95e4ef2200005d48c107f3dd1680cad3f73c8975.tar.bz2 | |
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* startup/bspstart.c:
Use "__asm__" instead of "asm" for improved c99-compliance.
Diffstat (limited to 'c/src/lib/libbsp/m68k/genmcf548x')
| -rw-r--r-- | c/src/lib/libbsp/m68k/genmcf548x/ChangeLog | 5 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c | 28 |
2 files changed, 19 insertions, 14 deletions
diff --git a/c/src/lib/libbsp/m68k/genmcf548x/ChangeLog b/c/src/lib/libbsp/m68k/genmcf548x/ChangeLog index 13b139feb4..81f2a3cb35 100644 --- a/c/src/lib/libbsp/m68k/genmcf548x/ChangeLog +++ b/c/src/lib/libbsp/m68k/genmcf548x/ChangeLog @@ -1,3 +1,8 @@ +2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> + + * startup/bspstart.c: + Use "__asm__" instead of "asm" for improved c99-compliance. + 2011-02-09 Ralf Corsépius <ralf.corsepius@rtems.org> * timer/timer.c: Include <rtems/btimer.h>. diff --git a/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c b/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c index 67774a2ad7..743ad4c9ad 100644 --- a/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c @@ -66,8 +66,8 @@ extern char WorkAreaBase []; /* * CPU-space access */ -#define m68k_set_acr2(_acr2) asm volatile ("movec %0,#0x0005" : : "d" (_acr2)) -#define m68k_set_acr3(_acr3) asm volatile ("movec %0,#0x0007" : : "d" (_acr3)) +#define m68k_set_acr2(_acr2) __asm__ volatile ("movec %0,#0x0005" : : "d" (_acr2)) +#define m68k_set_acr3(_acr3) __asm__ volatile ("movec %0,#0x0007" : : "d" (_acr3)) /* * Set initial cacr mode, mainly enables branch/intruction/data cache and @@ -160,10 +160,10 @@ void _CPU_cache_invalidate_1_instruction_line(const void *addr) { uint32_t a = (uint32_t) addr & ~0x3; - asm volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x0)); - asm volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x1)); - asm volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x2)); - asm volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x3)); + __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x0)); + __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x1)); + __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x2)); + __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x3)); } void _CPU_cache_enable_data(void) @@ -185,20 +185,20 @@ void _CPU_cache_invalidate_1_data_line( const void *addr) { uint32_t a = (uint32_t) addr & ~0x3; - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x0)); - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x1)); - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x2)); - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x3)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x0)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x1)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x2)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x3)); } void _CPU_cache_flush_1_data_line( const void *addr) { uint32_t a = (uint32_t) addr & ~0x3; - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x0)); - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x1)); - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x2)); - asm volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x3)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x0)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x1)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x2)); + __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x3)); } void _CPU_cache_flush_entire_data( void) |