bsps: Rework cache manager implementation

The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file.  Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.

Use the following directories and files:

* bsps/shared/cache

* bsps/@RTEMS_CPU@/shared/cache

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c

Update #3285.

2 files changed, 1 insertions, 120 deletions

diff --git a/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am b/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
index fba06369c9..111e6d2ce3 100644
--- a/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
+++ b/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
@@ -49,9 +49,7 @@ libbsp_a_SOURCES += irq/irq.c
 libbsp_a_SOURCES += irq/intc-icr-init-values.c
 
 # Cache
-libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
-libbsp_a_SOURCES += ../include/cache_.h
-libbsp_a_CPPFLAGS += -I$(srcdir)/include
+libbsp_a_SOURCES += ../../../../../../bsps/m68k/genmcf548x/start/cache.c
 
 if HAS_NETWORKING
 libbsp_a_SOURCES += network/network.c
diff --git a/c/src/lib/libbsp/m68k/genmcf548x/include/cache_.h b/c/src/lib/libbsp/m68k/genmcf548x/include/cache_.h
deleted file mode 100644
index 7d597c806c..0000000000
--- a/c/src/lib/libbsp/m68k/genmcf548x/include/cache_.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Copyright (c) 2007-2014 embedded brains GmbH.  All rights reserved.
- *
- *  embedded brains GmbH
- *  Dornierstr. 4
- *  82178 Puchheim
- *  Germany
- *  <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-
-#ifndef LIBBSP_M68K_GENMCF548X_CACHE_H
-#define LIBBSP_M68K_GENMCF548X_CACHE_H
-
-#include <bsp.h>
-
-#define CPU_DATA_CACHE_ALIGNMENT 16
-
-#define CPU_INSTRUCTION_CACHE_ALIGNMENT 16
-
-/*
- * There is no complete cache lock (only 2 ways of 4 can be locked)
- */
-static inline void _CPU_cache_freeze_data(void)
-{
-  /* Do nothing */
-}
-
-static inline void _CPU_cache_unfreeze_data(void)
-{
-  /* Do nothing */
-}
-
-static inline void _CPU_cache_freeze_instruction(void)
-{
-  /* Do nothing */
-}
-
-static inline void _CPU_cache_unfreeze_instruction(void)
-{
-  /* Do nothing */
-}
-
-static inline void _CPU_cache_enable_instruction(void)
-{
-  bsp_cacr_clear_flags( MCF548X_CACR_IDCM);
-}
-
-static inline void _CPU_cache_disable_instruction(void)
-{
-  bsp_cacr_set_flags( MCF548X_CACR_IDCM);
-}
-
-static inline void _CPU_cache_invalidate_entire_instruction(void)
-{
-  bsp_cacr_set_self_clear_flags( MCF548X_CACR_ICINVA);
-}
-
-static inline void _CPU_cache_invalidate_1_instruction_line(const void *addr)
-{
-  uint32_t a = (uint32_t) addr & ~0x3;
-
-  __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x0));
-  __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x1));
-  __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x2));
-  __asm__ volatile ("cpushl %%ic,(%0)" :: "a" (a | 0x3));
-}
-
-static inline void _CPU_cache_enable_data(void)
-{
-  bsp_cacr_clear_flags( MCF548X_CACR_DDCM( DCACHE_OFF_IMPRECISE));
-}
-
-static inline void _CPU_cache_disable_data(void)
-{
-  bsp_cacr_set_flags( MCF548X_CACR_DDCM( DCACHE_OFF_IMPRECISE));
-}
-
-static inline void _CPU_cache_invalidate_entire_data(void)
-{
-  bsp_cacr_set_self_clear_flags( MCF548X_CACR_DCINVA);
-}
-
-static inline void _CPU_cache_invalidate_1_data_line( const void *addr)
-{
-  uint32_t a = (uint32_t) addr & ~0x3;
-
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x0));
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x1));
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x2));
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x3));
-}
-
-static inline void _CPU_cache_flush_1_data_line( const void *addr)
-{
-  uint32_t a = (uint32_t) addr & ~0x3;
-
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x0));
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x1));
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x2));
-  __asm__ volatile ("cpushl %%dc,(%0)" :: "a" (a | 0x3));
-}
-
-static inline void _CPU_cache_flush_entire_data( void)
-{
-  uint32_t line = 0;
-
-  for (line = 0; line < 512; ++line) {
-    _CPU_cache_flush_1_data_line( (const void *) (line * 16));
-  }
-}
-
-#endif /* LIBBSP_M68K_GENMCF548X_CACHE_H */