Generic 68360 BSP (gen360) submitted by: W. Eric Norum <eric@skatter.usask.ca>.

Contact information:

    W. Eric Norum
    Saskatchewan Accelerator Laboratory
    107 North Road
    University of Saskatchewan
    Saskatoon, Saskatchewan, CANADA
    S7N 5C6

4 files changed, 523 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c b/c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c
new file mode 100644
index 0000000000..d741ad47dc
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c
@@ -0,0 +1,27 @@
+/*  bsp_cleanup()
+ *
+ *  This routine normally is part of start.s and usually returns
+ *  control to a monitor.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+void bsp_cleanup( void )
+{
+	/* Cause double bus fault to force reset? */
+}
diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c
new file mode 100644
index 0000000000..eac52ce9f5
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c
@@ -0,0 +1,247 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+ 
+#include <libcsupport.h>
+ 
+#include <string.h>
+#include <fcntl.h>
+ 
+#ifdef STACK_CHECKER_ON
+#include <stackchk.h>
+#endif
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table Configuration;
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+char *rtems_progname;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern void *_HeapStart;
+    extern rtems_unsigned32 _HeapSize;
+
+    /*
+     *  The last parameter to RTEMS_Malloc_Initialize is the "chunk"
+     *  size which a multiple of will be requested on each sbrk()
+     *  call by malloc().  A value of 0 indicates that sbrk() should
+     *  not be called to extend the heap.
+     */
+
+    RTEMS_Malloc_Initialize(&_HeapStart, _HeapSize, 0);
+
+    /*
+     *  Init the RTEMS libio facility to provide UNIX-like system
+     *  calls for use by newlib (ie: provide __open, __close, etc)
+     *  Uses malloc() to get area for the iops, so must be after malloc init
+     */
+
+    rtems_libio_init();
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+}
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *  Created:    95/03/10
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  NOTES:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ */
+ 
+void
+bsp_pretasking_hook(void)
+{
+    bsp_libc_init();
+ 
+#ifdef STACK_CHECKER_ON
+    /*
+     *  Initialize the stack bounds checker
+     *  We can either turn it on here or from the app.
+     */
+ 
+    Stack_check_Initialize();
+#endif
+ 
+#ifdef RTEMS_DEBUG
+    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+ 
+
+/*
+ * After drivers are setup, register some "filenames"
+ * and open stdin, stdout, stderr files
+ *
+ * Newlib will automatically associate the files with these
+ * (it hardcodes the numbers)
+ */
+ 
+void
+bsp_postdriver_hook(void)
+{
+  int stdin_fd, stdout_fd, stderr_fd;
+  int error_code;
+ 
+  error_code = 'S' << 24 | 'T' << 16;
+ 
+  if ((stdin_fd = __open("/dev/console", O_RDONLY, 0)) == -1)
+    rtems_fatal_error_occurred( error_code | 'D' << 8 | '0' );
+ 
+  if ((stdout_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
+    rtems_fatal_error_occurred( error_code | 'D' << 8 | '1' );
+ 
+  if ((stderr_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
+    rtems_fatal_error_occurred( error_code | 'D' << 8 | '2' );
+ 
+  if ((stdin_fd != 0) || (stdout_fd != 1) || (stderr_fd != 2))
+    rtems_fatal_error_occurred( error_code | 'I' << 8 | 'O' );
+}
+
+int main(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  extern void *_WorkspaceBase;
+  if ((argc > 0) && argv && argv[0])
+    rtems_progname = argv[0];
+  else
+    rtems_progname = "RTEMS";
+
+  /*
+   *  Allocate the memory for the RTEMS Work Space.  This can come from
+   *  a variety of places: hard coded address, malloc'ed from outside
+   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
+   *  typically done by stock BSPs) by subtracting the required amount
+   *  of work space from the last physical address on the CPU board.
+   */
+#if 0
+  Cpu_table.interrupt_vector_table = (mc68000_isr *) 0/*&M68Kvec*/;
+#endif
+
+
+  /*
+   *  Copy the Configuration Table .. so we can change it
+   */
+
+  BSP_Configuration = Configuration;
+
+  /*
+   * Add 1 region for the RTEMS Malloc
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Tell libio how many fd's we want and allow it to tweak config
+   */
+
+  rtems_libio_config(&BSP_Configuration, BSP_LIBIO_MAX_FDS);
+
+  /*
+   *  Need to "allocate" the memory for the RTEMS Workspace and
+   *  tell the RTEMS configuration where it is.  This memory is
+   *  not malloc'ed.  It is just "pulled from the air".
+   */
+
+  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
+
+  /*
+   *  initialize the CPU table for this BSP
+   */
+
+  /*
+   *  we do not use the pretasking_hook
+   */
+
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+
+  Cpu_table.predriver_hook = NULL;
+
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Don't forget the other CPU Table entries.
+   */
+
+  /*
+   *  Start RTEMS
+   */
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+
+  bsp_cleanup();
+
+  return 0;
+}
diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c
new file mode 100644
index 0000000000..71474c319e
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c
@@ -0,0 +1,172 @@
+/*
+ * Initialize 68360 hardware
+ *
+ * W. Eric Norum
+ * Saskatchewan Accelerator Laboratory
+ * University of Saskatchewan
+ * Saskatoon, Saskatchewan, CANADA
+ * eric@skatter.usask.ca
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include "mc68360.h"
+
+void
+_Init68360 (void)
+{
+	int i;
+	extern void *_RomBase, *_RamBase;
+	m68k_isr_entry *vbr;
+	extern void _ClearBSSAndStart (void);
+
+	/*
+	 * Step 6: Is this a power-up reset?
+	 * For now we just ignore this and do *all* the steps
+	 * Someday we might want to:
+	 *	if (Hard, Loss of Clock, Power-up)
+	 *		Do all steps
+	 *	else if (Double bus fault, watchdog or soft reset)
+	 *		Skip to step 12
+	 *	else (must be a CPU32+ reset command)
+	 *		Skip to step 14
+	 */
+
+	/*
+	 * Step 7: Deal with clock synthesizer
+	 * HARDWARE:
+	 *	Change if you're not using an external 25 MHz oscillator.
+	 */
+	m360.clkocr = 0x8F;	/* No more writes, no clock outputs */
+	m360.pllcr = 0xD000;	/* PLL, no writes, no prescale,  */
+					/* no LPSTOP slowdown, PLL X1 */
+	m360.cdvcr = 0x8000;	/* No more writes, no clock division */
+
+	/*
+	 * Step 8: Initialize system protection
+	 *	Disable watchdog FIXME: Should use watchdog!!!!
+	 *	Watchdog causes system reset
+	 *	Fastest watchdog timeout
+	 *	Enable double bus fault monitor
+	 *	Enable bus monitor external
+	 *	128 clocks for external timeout
+	 */
+	m360.sypcr = 0x4F;
+
+	/*
+	 * Step 9: Clear parameter RAM and reset communication processor module
+	 */
+	for (i = 0 ; i < 192  ; i += sizeof (long)) {
+		*((long *)((char *)&m360 + 0xC00 + i)) = 0;
+		*((long *)((char *)&m360 + 0xD00 + i)) = 0;
+		*((long *)((char *)&m360 + 0xE00 + i)) = 0;
+		*((long *)((char *)&m360 + 0xF00 + i)) = 0;
+	}
+	m360.cr = M360_CR_RST | M360_CR_FLG;
+
+	/*
+	 * Step 10: Write PEPAR
+	 *	SINTOUT not used (CPU32+ mode)
+	 *	CF1MODE=00 (CONFIG1 input)
+	 *	RAS1* double drive
+	 *	A31-A28
+	 *	OE* output
+	 *	CAS2* / CAS3*
+	 *	CAS0* / CAS1*
+	 *	CS7*
+	 *	AVEC*
+	 * HARDWARE:
+	 *	Change if you are using a different memory configuration
+	 *	(static RAM, external address multiplexing, etc).
+	 */
+	m360.pepar = 0x0100;
+
+	/*
+	 * Step 11: Remap Chip Select 0 (CS0*), set up GMR
+	 *	1024 addresses per DRAM page (1M DRAM chips)
+	 *	60 nsec DRAM
+	 *	180 nsec ROM (3 wait states)
+	 * HARDWARE:
+	 *	Change if you are using a different memory configuration
+	 */
+	m360.gmr = M360_GMR_RCNT(24) | M360_GMR_RFEN | M360_GMR_RCYC(0) |
+			M360_GMR_PGS(3) | M360_GMR_DPS_32BIT | M360_GMR_NCS |
+			M360_GMR_GAMX;
+	m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP |
+							M360_MEMC_BR_V;
+	m360.memc[0].or = M360_MEMC_OR_WAITS(3) | M360_MEMC_OR_512KB |
+							M360_MEMC_OR_8BIT;
+
+	/*
+	 * Step 12: Initialize the system RAM
+	 *	Set up option/base registers
+	 *		4 MB DRAM
+	 *		60 nsec DRAM
+	 *	Wait for chips to power up
+	 *	Perform 8 read cycles
+	 *	Set all parity bits to correct state
+	 *	Enable parity checking
+	 * HARDWARE:
+	 *	Change if you are using a different memory configuration
+	 */
+	m360.memc[1].or = M360_MEMC_OR_TCYC(0) | M360_MEMC_OR_4MB |
+				M360_MEMC_OR_DRAM;
+	m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
+	for (i = 0; i < 50000; i++)
+		continue;
+	for (i = 0; i < 8; ++i)
+		*((volatile unsigned long *)(unsigned long)&_RamBase);
+	for (i = 0 ; i < 4*1024*1024 ; i += sizeof (unsigned long)) {
+		volatile unsigned long *lp;
+		lp = (unsigned long *)((unsigned char *)&_RamBase + i);
+		*lp = *lp;
+	}
+	m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_PAREN |
+								M360_MEMC_BR_V;
+
+	/*
+	 * Step 13: Copy  the exception vector table to system RAM
+	 */
+	asm volatile ("movec vbr,%0" : "=r" (vbr) : );
+	for (i = 0; i < 256; ++i)
+		M68Kvec[i] = vbr[i];
+	asm volatile ("movec %0,vbr" : : "r" (M68Kvec));
+	
+	/*
+	 * Step 14: More system initialization
+	 * SDCR (Serial DMA configuratin register)
+	 *	Give SDMA priority over all interrupt handlers
+	 *	Set DMA arbiration level to 4
+	 * CICR (CPM interrupt configuration register):
+	 *	SCC1 requests at SCCa position
+	 *	SCC2 requests at SCCb position
+	 *	SCC3 requests at SCCc position
+	 *	SCC4 requests at SCCd position
+	 *	Interrupt request level 4
+	 *	Maintain original priority order
+	 *	Vector base 128
+	 *	SCCs priority grouped at top of table
+	 */
+	m360.sdcr = M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
+	m360.cicr = (3 << 22) | (2 << 20) | (1 << 18) | (0 << 16) |
+						(4 << 13) | (0x1F << 8) | (128);
+
+	/*
+	 * Step 15: Set module configuration register
+	 *	Disable timers during FREEZE
+	 *	Enable bus monitor during FREEZE
+	 *	BCLRO* arbitration level 3
+	 *	No show cycles
+	 *	User/supervisor access
+	 *	Bus clear interupt service level 7
+	 *	SIM60 interrupt sources higher priority than CPM
+	 */
+	m360.mcr = 0x4C7F;
+
+	/*
+	 * Clear BSS, switch stacks and call main()
+	 */
+	_ClearBSSAndStart ();
+}
diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/linkcmds b/c/src/lib/libbsp/m68k/gen68360/startup/linkcmds
new file mode 100644
index 0000000000..0eb212d4b8
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/gen68360/startup/linkcmds
@@ -0,0 +1,77 @@
+/*
+ *  This file contains GNU linker directives for a generic MC68360 board.
+ *
+ * Saskatchewan Accelerator Laboratory
+ * University of Saskatchewan
+ * Saskatoon, Saskatchewan, CANADA
+ * eric@skatter.usask.ca
+ * 
+ *  $Id$
+ */
+
+/*
+ * Declare on-board memory
+ */
+MEMORY {
+	  ram : ORIGIN = 0x00000000, LENGTH = 4M
+	  rom : ORIGIN = 0xFF000000, LENGTH = 1M
+	dpram : ORIGIN = 0xFE000000, LENGTH = 8k
+}
+
+/*
+ * Declare some sizes
+ */
+HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000;
+StackSize = DEFINED(StackSize) ? StackSize : 0x1000;
+
+/*
+ * Load objects
+ */
+SECTIONS {
+        .text : {
+		__RamBase = .;
+		CREATE_OBJECT_SYMBOLS
+		*(.text)
+		. = ALIGN (16);
+		_etext = .;
+        } >ram 
+        .data : {
+		*(.data)
+		. = ALIGN (16);
+		_edata = .;
+        } >ram
+        .bss : {
+		_M68Kvec = .;
+		. += (256 * 4);
+		clear_start = .;
+		*(.bss)
+		*(COMMON)
+		. = ALIGN (16);
+		_end = .;
+
+		__HeapStart = .;
+		. += HeapSize;
+		. += StackSize;
+		. = ALIGN (16);
+		stack_init = .;
+		clear_end = .;
+
+		__WorkspaceBase = .;
+	} >ram
+
+	/*
+	 * On-chip memory/peripherals
+	 */
+	dpram : {
+		_m360 = .;
+		. += (8 * 1024);
+
+	} >dpram
+
+	/*
+	 * Boot PROM
+	 */
+	rom : {
+		__RomBase = .;
+	} >rom
+}