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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-06-07 01:27:28 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-06-07 01:27:28 +0000 |
| commit | 9e86dd7db7e8cc17a851d348917cbe7cdd489ce1 (patch) | |
| tree | d275acc6b640f6d2d05c920c833d399181a1268f /c/src/lib/libbsp/m68k/gen68302/timer/timerisr.s | |
| parent | added calls to _Thread_Disable_dispatch to match requirements (diff) | |
| download | rtems-9e86dd7db7e8cc17a851d348917cbe7cdd489ce1.tar.bz2 | |
incorporated mc68302 support
Diffstat (limited to 'c/src/lib/libbsp/m68k/gen68302/timer/timerisr.s')
| -rw-r--r-- | c/src/lib/libbsp/m68k/gen68302/timer/timerisr.s | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/gen68302/timer/timerisr.s b/c/src/lib/libbsp/m68k/gen68302/timer/timerisr.s new file mode 100644 index 0000000000..c804b9dfa6 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68302/timer/timerisr.s @@ -0,0 +1,28 @@ +/* + * Handle 68302 TIMER2 interrupts. + * + * All code in this routine is pure overhead which can perturb the + * accuracy of RTEMS' timing test suite. + * + * See also: Read_timer() + * + * To reduce overhead this is best to be the "rawest" hardware interupt + * handler you can write. This should be the only interrupt which can + * occur during the measured time period. + * + * An external counter, Timer_interrupts, is incremented. + * + * $Id$ + */ + +#include "asm.h" + +BEGIN_CODE + PUBLIC(timerisr) +SYM(timerisr): + move.w #0x0040,SYM(m302)+2072 | clear interrupt in-service bit + move.b #3,SYM(m302)+2137 | clear timer interrupt event register + addq.l #1,SYM(Timer_interrupts) | increment timer value + rte +END_CODE +END |